Datasheet

AD5258
Rev. 0 | Page 7 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
05029-008
AD5258
TOP VIEW
(Not to Scale)
W
1
AD0 2
AD1 3
SD
A
4
SCL 5
A
B
V
DD
GND
V
LOGIC
10
9
8
7
6
Figure 5. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 W W Terminal, GND ≤ V
W
≤ V
DD
.
2 ADO
Programmable Three-State Address Bit 0 for Multiple Package Decoding. State is registered on
power-up.
3 AD1
Programmable Three-State Address Bit 1 for Multiple Package Decoding. State is registered on
power-up.
4 SDA Serial Data Input/Output.
5 SCL Serial Clock Input. Positive edge triggered.
6 V
LOGIC
Logic Power Supply.
7 GND Digital Ground.
8 V
DD
Positive Power Supply.
9 B B Terminal, GND ≤ V
B
≤ V
DD
.
10 A A Terminal, GND ≤ V
A
≤ V
DD
.