Datasheet

AD5258
Rev. 0 | Page 16 of 24
I
2
C BYTE FORMATS
The following generic, write, read, and store/restore control
registers for the AD5258 all refer to the device addresses listed
in Table 5, and the mode/condition reference key (S, P, SA, MA,
NA,
W
, R, and X) listed below.
S = Start Condition
P = Stop Condition
SA = Slave Acknowledge
MA = Master Acknowledge
NA = No Acknowledge
W
= Write
R = Read
X = Don’t Care
Table 5. Device Address Lookup
AD1 and AD0 are three-state address pins.
Device Address
AD1
AD0
0011000 0 0
0011001 NC 0
0011010 1 0
0101001 0 NC
0101010 NC NC
0101011 1 NC
1001100 0 1
1001101 NC 1
1001110 1 1
GENERIC INTERFACE
Table 6. Generic Interface Format
S
7-Bit Device Address
(See Table 5)
R/
W
SA C2 C1 C0 A4 A3 A2 A1 A0 SA D7 D6 D5 D4 D3 D2 D1 D0 SA P
Slave Address Byte Instruction Byte Data Byte
Table 7. RDAC-to-EEPROM Interface Command Descriptions
C2 C1 C0 Command Description
0 0 0 Operation between I
2
C and RDAC
0 0 1 Operation between I
2
C and EEPROM
0 1 0
Operation between I
2
C and Write Protection
Register. See Table 10.
1 0 0 NOP
1 0 1 Restore EEPROM to RDAC
1 1 0 Store RDAC to EEPROM