Datasheet

Data Sheet AD5251/AD5252
Rev. D | Page 9 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
AD0
WP
W1
SDA
A1
B1
V
DD
14
13
1
2
11
10
9
8
B3
A3
AD1
V
SS
SCL
DGND
W3
03823-0-002
AD5251/
AD5252
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Positive Power Supply Pin. Connect +2.7 V to +5 V for single supply or ±2.7 V for dual supply, where
V
DD
– V
SS
≤ 5.5 V. V
DD
must be able to source 35 mA for 26 ms when storing data to EEMEM.
2 AD0 I
2
C Device Address 0. AD0 and AD1 allow four AD5251/AD5252 devices to be addressed.
3
WP
Write Protect, Active Low. V
WP
≤ V
DD
+ 0.3 V.
4 W1 Wiper Terminal of RDAC1. V
SS
≤ V
W1
≤ V
DD
.
1
5 B1 B Terminal of RDAC1. V
SS
≤ V
B1
≤ V
DD
.
1
6 A1 A Terminal of RDAC1. V
SS
≤ V
A1
≤ V
DD
.
1
7 SDA Serial Data Input/Output Pin. Shifts in one bit at a time upon positive clock edges. MSB loaded first.
Open-drain MOSFET requires pull-up resistor.
8 V
SS
Negative Supply. Connect to 0 V for single supply or –2.7 V for dual supply, where V
DD
– V
SS
≤ +5.5 V. If
V
SS
is used in dual supply, V
SS
must be able to sink 35 mA for 26 ms when storing data to EEMEM.
9 SCL Serial Input Register Clock Pin. Shifts in one bit at a time upon positive clock edges. V
SCL
≤ (V
DD
+ 0.3 V).
Pull-up resistor is recommended for SCL to ensure minimum power.
10
DGND
Digital Ground. Connect to system analog ground at a single point.
11 AD1 I
2
C Device Address 1. AD0 and AD1 allow four AD5251/AD5252 devices to be addressed.
12 A3 A Terminal of RDAC3. V
SS
≤ V
A3
≤ V
DD
.
1
13 B3 B Terminal of RDAC3. V
SS
≤ V
B3
≤ V
DD
.
1
14 W3 Wiper Terminal of RDAC3. V
SS
≤ V
W3
≤ V
DD
.
1
1
For quad-channel device software compatibility, the dual potentiometers in the parts are designated as RDAC1 and RDAC3.