Datasheet

AD524
Rev. F | Page 14 of 28
TEST CIRCUITS
AD524
G = 10
G = 100
G = 1000
10k
0.01%
1k
10T
10k
0.1%
V
OUT
+V
S
+
INPUT
20V p-p
11k
0.1%
1k
0.1%
100
0.1%
–V
S
RG
1
RG
2
100k
0.1%
1
16
13
12
9
11
10
6
3
8
7
2
00500-031
Figure 31. Settling Time Test Circuit
–IN
C4C3
+IN
REFERENCE
SENSE
A3
4.44k
404
40
G = 100
G = 1000
Q2, Q4
Q1, Q3
+V
S
I
1
50µA
I
2
50µA
A1 A2
R52
20k
R55
20k
V
O
CH
1
I
4
50µA
–V
S
I
3
50µA
V
B
R53
20k
R54
20k
CH
2
, CH
3
,
CH
4
RG
2
RG
1
CH
1
CH
2
,
CH
3
, CH
4
R57
20k
R56
20k
++
00500-032
Figure 32. Simplified Circuit of Amplifier; Gain Is Defined as
((R56 + R57)/(R
G
)) +1; For a Gain of 1, R
G
Is an Open Circuit