Datasheet

Data Sheet AD5247
Rev. F | Page 3 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 kΩ VERSION
V
DD
= 5 V ± 10% or 3 V ± 10%, V
A
= V
DD
, −40°C < T
A
< +125°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ
1
Max Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity
2
R-DNL R
WB
, V
A
= no connect −1.5 ±0.1 +1.5 LSB
Resistor Integral Nonlinearity
2
R-INL R
WB
, V
A
= no connect −4 ±0.75 +4 LSB
Nominal Resistor Tolerance
3
∆R
AB
−30 +30 %
Resistance Temperature Coefficient
3
∆R
AB
/∆T 45 ppm/°C
Output Resistance R
WB
Code = 0x00 75 300 Ω
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE
Differential Nonlinearity
4
DNL −1 ±0.1 +1 LSB
Integral Nonlinearity
4
INL −1 ±0.2 +1 LSB
Voltage Divider Temperature Coefficient ∆V
W
/∆T Code = 0x40 15 ppm/°C
Full-Scale Error V
WFSE
Code = 0x7F −3 −2 0 LSB
Zero-Scale Error V
WZSE
Code = 0x00 0 1 2 LSB
RESISTOR TERMINALS
Voltage Range
5
V
A,
V
W
GND V
DD
V
Capacitance A
6
C
A
f = 1 MHz, measured to GND,
code = 0x40 45 pF
Capacitance W
6
C
W
f = 1 MHz, measured to GND,
code = 0x40 60 pF
Common-Mode Leakage I
CM
V
A
= V
DD
/2 1 nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High V
IH
V
DD
= 5 V 2.4 V
Input Logic Low V
IL
V
DD
= 5 V 0.8 V
Input Logic High V
IH
V
DD
= 3 V 2.1 V
Input Logic Low V
IL
V
DD
= 3 V 0.6 V
Input Current I
IL
V
IN
= 0 V or 5 V ±1 μA
Input Capacitance
6
C
IL
5 pF
Output Logic Low (SDA) V
OL
I
OL
= 3 mA 0.4 V
I
OL
= 6 mA 0.6 V
POWER SUPPLIES
Power Supply Range V
DD RANGE
2.7 5.5 V
Supply Current I
DD
V
DD
= 5.5 V; V
IH
= V
DD
or V
IL
= GND 3 7 μA
V
DD
= 5 V; V
IH
= V
DD
or V
IL
= GND 2.5 5.2 μA
V
DD
= 3.3 V; V
IH
= V
DD
or V
IL
= GND 0.9 2 μA
Power Dissipation
7
P
DISS
V
IH
= 5 V or V
IL
= 0 V, V
DD
= 5 V 40 μW
Power Supply Sensitivity PSSR V
DD
= 5 V ± 10%,
code = midscale
±0.003 ±0.05 %/%
DYNAMIC CHARACTERISTICS
6, 8
Bandwidth –3 dB BW_5 K R
AB
= 5 kΩ, code = 0x40 1.2 MHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms, V
B
= 0 V, f = 1 kHz 0.05 %
V
W
Settling Time t
S
V
A
= 5 V, ±1 LSB error band 1 μs
Resistor Noise Voltage Density e
N_WB
R
WB
= 2.5 kΩ, R
S
= 0 Ω 6 nV/√Hz
1
Typical specifications represent average readings at 25°C and V
DD
= 5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3
V
A
= V
DD
, wiper (V
W
) = no connect.
4
INL and DNL are measured at V
W,
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
A
= V
DD
and V
B
= 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic under operating conditions.
5
Resistor Terminal A and Resistor Terminal W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
8
All dynamic characteristics use V
DD
= 5 V.