Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Test Circuits
- I2C Interface
- Theory of Operation
- Programming the Variable Resistor
- Programming the Potentiometer Divider
- I2C-Compatible 2-Wire Serial Bus
- Level Shifting for Bidirectional Interface
- ESD Protection
- Terminal Voltage Operating Range
- Maximum Operating Current
- Power-Up Sequence
- Layout and Power Supply Bypassing
- Constant Bias to Retain Resistance Setting
- Outline Dimensions

AD5247 Data Sheet
Rev. F | Page 12 of 20
TEST CIRCUITS
Figure 27 to Figure 32 define the test conditions used in the Specifications section.
A
W
B
DUT
V+
03876-025
V+ = V
DD
1LSB = V+/2
N
V
MS
Figure 27. Potentiometer Divider Nonlinearity Error (INL, DNL)
V
MS
NO CONNECT
A
W
B
DUT
03876-026
I
W
Figure 28. Resistor Position Nonlinearity Error (R-INL, R-DNL)
V
MS2
A
W
B
DUT
03876-027
V
MS1
V
W
I
W
= V
DD
/R
NOMINAL
R
W
= [V
MS1
– V
MS2
]/I
W
Figure 29. Wiper Resistance
V+ = V
DD
± 10%
DUT
A
W
B
V+
03876-028
V
MS
V
A
V
DD
ΔV
MS
%
ΔV
DD
%
PSSR (%/%) =
Figure 30. Power Supply Sensitivity (PSS, PSSR)
W
A
B
+15V
DUT
–15V
V
OUT
OP27
V
IN
03876-029
Figure 31. Gain vs. Frequency
V
DD
A
W
B
GND
I
CM
V
CM
NC
DUT
NC
03876-030
Figure 32. Common-Mode Leakage Current