Datasheet
AD5245
Rev. B | Page 4 of 20
10 kΩ, 50 kΩ, 100 kΩ VERSIONS
V
DD
= 5 V ± 10% or 3 V ± 10%, V
A
= V
DD
, V
B
= 0 V, –40°C < T
A
< +125°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ
1
Max Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity
2
R-DNL R
WB
, V
A
= no connect –1 ±0.1 +1 LSB
Resistor Integral Nonlinearity
2
R-INL R
WB
, V
A
= no connect –2 ±0.25 +2 LSB
Nominal Resistor Tolerance
3
∆R
AB
T
A
= 25°C –30 +30 %
Resistance Temperature Coefficient (∆R
AB
/R
AB
)/∆T × 10
6
V
AB
= V
DD
, wiper = no connect 45 ppm/°C
Wiper Resistance R
W
V
DD
= 5 V 50 120 Ω
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Differential Nonlinearity
4
DNL –1 ±0.1 +1 LSB
Integral Nonlinearity
4
INL –1 ±0.3 +1 LSB
Voltage Divider Temperature Coefficient (∆V
W
/V
W
)/∆T × 10
6
Code = 0x80 15 ppm/°C
Full-Scale Error V
WFSE
Code = 0xFF –3 –1 0 LSB
Zero-Scale Error V
WZSE
Code = 0x00 0 1 3 LSB
RESISTOR TERMINALS
Voltage Range
5
V
A
, V
B
, V
W
GND V
DD
V
Capacitance A, B
6
C
A
, C
B
f = 1 MHz, measured to GND,
code = 0x80
90 pF
Capacitance W
6
C
W
f = 1 MHz, measured to GND,
code = 0x80
95 pF
Shutdown Supply Current I
A_SD
V
DD
= 5.5 V 0.01 1 µA
Common-Mode Leakage I
CM
V
A
= V
B
= V
DD
/2 1 nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High V
IH
V
DD
= 5 V 2.4 V
Input Logic Low V
IL
V
DD
= 5 V 0.8 V
Input Logic High V
IH
V
DD
= 3 V 2.1 V
Input Logic Low V
IL
V
DD
= 3 V 0.6 V
Input Current I
IL
V
IN
= 0 V or 5 V ±1 µA
Input Capacitance
6
C
IL
5 pF
POWER SUPPLIES
Power Supply Range V
DD RANGE
2.7 5.5 V
Supply Current I
DD
V
IH
= 5 V or V
IL
= 0 V 3 8 µA
Power Dissipation
7
P
DISS
V
IH
= 5 V or V
IL
= 0 V, V
DD
= 5 V 44 µW
Power Supply Sensitivity PSS
V
DD
= 5 V ± 10%,
code = midscale
±0.02 ±0.05 %/%
DYNAMIC CHARACTERISTICS
6, 8
Bandwidth –3 dB BW
R
AB
= 10 kΩ/50 kΩ/100 kΩ,
code = 0x80
600/100/40 kHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms, V
B
= 0 V, f = 1 kHz,
R
AB
= 10 kΩ
0.1 %
V
W
Settling Time (10 kΩ/50 kΩ/100 kΩ) t
S
V
A
= 5 V, V
B
= 0 V,
±1 LSB error band
2 µs
Resistor Noise Voltage Density e
N_WB
R
WB
= 5 kΩ, R
S
= 0 9 nV/√Hz
1
Typical specifications represent average readings at 25°C and V
DD
= 5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3
V
AB
= V
DD
, wiper (V
W
) = no connect.
4
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
8
All dynamic characteristics use V
DD
= 5 V.