Datasheet

–2–
REV. 0
AD5222–SPECIFICATIONS
(V
DD
= 3 V ⴞ 10% or 5 V ⴞ 10%, V
SS
= 0 V, V
A
= +V
DD
, V
B
= 0 V, –40ⴗC < T
A
< +85ⴗC,
unless otherwise noted.)
Parameter Symbol Condition Min Typ
1
Max Unit
DC CHARACTERISTICS RHEOSTAT MODE (Specifications Apply to All VRs)
Resistor Differential NL
2
R-DNL R
WB
, V
A
= NC –1 ±1/4 +1 LSB
Resistor Nonlinearity
2
R-INL R
WB
, V
A
= NC –1 ±0.4 +1 LSB
Nominal Resistor Tolerance ∆RV
AB
= V
DD
, Wiper = No Connect, T
A
= 25°C –30 +30 %
Resistance Temperature Coefficient R
AB
/∆TV
AB
= V
DD
, Wiper = No Connect –35 ppm/°C
Wiper Resistance
3
R
W
I
W
= V
DD
/R, V
DD
= 3 V or 5 V 45 100 Ω
Nominal Resistance Match ∆R/R
O
CH 1 to 2, V
AB
= V
DD
, T
A
= 25°C0.21%
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Resolution N 7 Bits
Integral Nonlinearity
4
INL R
AB
= 10 kΩ, 50 kΩ, or 100 kΩ –1 ±1/4 +1 LSB
INL R
AB
= 1 MΩ –2 ±1/2 +2 LSB
Differential Nonlinearity
4
DNL –1 ±1/4 +1 LSB
Voltage Divider Temperature Coefficient ∆V
W
/∆T Code = 40
H
20 ppm/°C
Full-Scale Error V
WFSE
Code = 7F
H
–1 –0.5 +0 LSB
Zero-Scale Error V
WZSE
Code = 00
H
0 0.5 1 LSB
RESISTOR TERMINALS
Voltage Range
5
V
A, B, W
V
SS
V
DD
V
Capacitance
6
A, B C
A, B
f = 1 MHz, Measured to GND, Code = 40
H
45 pF
Capacitance
6
WC
W
f = 1 MHz, Measured to GND, Code = 40
H
60 pF
Common-Mode Leakage I
CM
V
A
= V
B
= V
W
1nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High V
IH
V
DD
= 5 V/3 V 2.4/2.1 V
Input Logic Low V
IL
V
DD
= 5 V/3 V 0.8/0.6 V
Input Current I
IL
V
IN
= 0 V or 5 V ±1 µA
Input Capacitance
6
C
IL
5pF
POWER SUPPLIES
Power Single-Supply Range V
DD RANGE
V
SS
= 0 V 2.7 5.5 V
Power Dual-Supply Range V
DD/SS RANGE
±2.3 ±2.7 V
Positive Supply Current I
DD
V
IH
= 5 V or V
IL
= 0 V 15 40 µA
Negative Supply Current I
SS
V
SS
= –2.5 V, V
DD
= +2.7 V 15 40 µA
Power Dissipation
7
P
DISS
V
IH
= 5 V or V
IL
= 0 V, V
DD
= 5 V 150 400 µW
Power Supply Sensitivity PSS 0.002 0.05 %/%
DYNAMIC CHARACTERISTICS
6, 8, 9
Bandwidth –3 dB BW_10K R
AB
= 10 kΩ, Code = 40
H
1000 kHz
BW_50K R
AB
= 50 kΩ, Code = 40
H
180 kHz
BW_100K R
AB
= 100 kΩ, Code = 40
H
78 kHz
BW_1M R
AB
= 500 kΩ, Code = 40
H
7kHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms + 2 V dc, V
B
= 2 V dc, f = 1 kHz 0.005 %
V
W
Settling Time t
S
R
AB
= 10 kΩ, ± 1 LSB Error Band 2 µs
Resistor Noise Voltage e
N_WB
R
WB
= 5 kΩ, f = 1 kHz 14 nV√Hz
INTERFACE TIMING CHARACTERISTICS (Applies to All Parts)
6, 10
Input Clock Pulsewidth t
CH
, t
CL
Clock Level High or Low 30 ns
CS to CLK Setup Time t
CSS
20 ns
CS Rise to CLK Hold Time t
CSH
20 ns
U/D to Clock Fall Setup Time t
UDS
10 ns
U/D to Clock Fall Hold Time t
UDH
30 ns
DACSEL to Clock Fall Setup Time t
DSS
20 ns
DACSEL to Clock Fall Hold Time t
DSH
30 ns
MODE to Clock Fall Setup Time t
MDS
20 ns
MODE to Clock Fall Hold Time t
MDH
40 ns
NOTES
1
Typicals represent average readings at 25°C, V
DD
= 5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions.
R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 22 test circuit.
3
Wiper resistance is not measured on the R
AB
= 1 MΩ models.
4
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V. DNL
specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. See Figure 21 test circuit.
5
Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
8
Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest bandwidth.
The highest R value results in the minimum overall power consumption.
9
All dynamic characteristics use V
DD
= 5 V.
10
See timing diagram for location of measured values. All input control voltages are specified with t
R
= t
F
= 2.5 ns (10% to 90% of +3 V) and timed from a voltage level
of 1.5 V. Switching characteristics are measured using both V
DD
= 5 V or V
DD
= 3 V.
Specifications subject to change without notice.