Datasheet

AD521
Where offset errors are critical, a resistor equal to the parallel
combination of Rl and Rz should be placed between pin 11
and VREF. This minimizes the offset errors resulting from the
input current flowing in Rl and Rz at the sense tenninal. Note
that gain changes introduced by changing the Rl/Rz attenua-
tor will have a minimum effect on output offset if the offset
is carefully nulled at the highest gain setting.
When a predetennined output offset is desired, VREF can be
placed in series with pin 11. This offset is then multiplied by
the gain factor 1 + R2/Rl as shown in the equation of
Figure 6.
RS
VIN
RG
VOUT= VIN
~
RG
I
I VCM
L - -.4'}---------
'-
Figure 7. Ground loop elimination. The reference input, Pin 11,
allows remote referencing of ground potential. Differences in
ground potentials are attenuated by the high CMRR of the
AD521.
lOOk
8
IOk
CHART
RECORDER
2.5j.F
COMMON
Figure 8. Test circuit for measuring peak to peak noise in the
bandwidth 0.1Hz to 10Hz. Typical measurements are found by
reading the maximum peak to peak voltage noise of the device
under test fD.U. T.) for 3 observation periods of 10 seconds each.
- - ---
REV.A
~
- - - ---
--- -
+15V
I
3Oon
1
HF
lOOk
O.,&,.FT
1
I
14
lOOk
---tt-
F
I
10Mn
-
=1
O.I&,.F I I
3Oon
-15V
Not Recommended for new Designs