Datasheet
AD5204/AD5206
Rev. C | Page 7 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC
1
NC
2
GND
3
CS
4
B4
24
W4
23
A4
22
B2
21
PR
5
V
DD
6
SHDN
7
W2
20
A2
19
A1
18
SDI
8
W1
17
CLK
9
B1
16
SDO
10
A3
15
V
SS
11
W3
14
NC
12
B3
13
AD5204
TOP VIEW
(Not to Scale)
NC = NO CONNECT
06884-006
Figure 6. AD5204 SOIC/TSSOP/PDIP Pin Configuration
Table 3. AD5204 SOIC/TSSOP/PDIP Pin Function Descriptions
Pin No. Name Description
1, 2, 12 NC Not Connected.
3 GND Ground.
4
CS
Chip Select Input (Active Low). When CS returns high, data in the serial input register is decoded based on the address
bits, and then it is loaded into the target RDAC latch.
5
PR
Preset to Midscale (Active Low). This pin sets the RDAC registers to 0x80.
6 V
DD
Positive Power Supply. This pin is specified for operation at both 3 V and 5 V. It is the sum of |V
DD
| + |V
SS
| < 5.5 V.
7
SHDN
Terminal A Open-Circuit Shutdown (Active Low Input). This pin controls VR 1 through VR 4.
8 SDI Serial Data Input. Data is input MSB first.
9 CLK Serial Clock Input. This pin is positive edge triggered.
10 SDO Serial Data Output. This pin is an open-drain transistor and requires a pull-up resistor.
11 V
SS
Negative Power Supply. This pin is specified for operation at both 0 V and −2.7 V. It is the sum of |V
DD
| + |V
SS
| < 5.5 V.
13 B3 Terminal B RDAC 3.
14 W3 Wiper RDAC 3. Address = 010
2
.
15 A3 Terminal A RDAC 3.
16 B1 Terminal B RDAC 1.
17 W1 Wiper RDAC 1. Address = 000
2
.
18 A1 Terminal A RDAC 1.
19 A2 Terminal A RDAC 2.
20 W2 Wiper RDAC 2. Address = 001
2
.
21 B2 Terminal B RDAC 2.
22 A4 Terminal A RDAC 4.
23 W4 Wiper RDAC 4. Address = 011
2
.
24 B4 Terminal B RDAC 4.