Datasheet

–2– REV. 0
AD5203–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ
1
Max Units
DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs
Resistor Differential NL
2
R-DNL R
WB
, V
A
= No Connect –0.25 ±0.1 +0.25 LSB
Resistor Nonlinearity Error
2
R-INL R
WB
, V
A
= No Connect –0.5 ±0.1 +0.5 LSB
Nominal Resistor Tolerance
3
∆R
AB
–30 +30 %
Resistance Temperature Coefficient ∆R
AB
/∆TV
AB
= V
DD
, Wiper = No Connect 700 ppm/°C
Wiper Resistance R
W
I
W
= 1 V/R
AB
45 100 Ω
Nominal Resistance Match ∆R/R
O
CH 1 to CH 2, V
AB
= V
DD
, T
A
= +25°C 0.2 1 %
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE Specifications Apply to All VRs
Resolution N 6 Bits
Differential Nonlinearity Error
4
DNL –0.25 ±0.1 +0.25 LSB
Integral Nonlinearity Error
4
INL –0.75 ±0.1 +0.75 LSB
Voltage Divider Temperature Coefficient ∆V
W
/∆T Code = 20
H
20 ppm/°C
Full-Scale Error V
WFSE
Code = 3F
H
–0.75 –0.2 0 LSB
Zero-Scale Error V
WZSE
Code = 00
H
0 +0.1 +0.75 LSB
RESISTOR TERMINALS
Voltage Range
5
V
A,
V
B,
V
W
0V
DD
V
Capacitance
6
Ax, Bx C
A,
C
B
f = 1 MHz, Measured to GND, Code = 20
H
75 pF
Capacitance
6
Wx C
W
f = 1 MHz, Measured to GND, Code = 20
H
120 pF
Shutdown Supply Current
7
I
A_SD
V
A
= V
DD
, V
B
= 0 V, SHDN = 0 0.01 5 µA
Shutdown Wiper Resistance R
W_SD
V
A
= V
DD
, V
B
= 0 V, SHDN = 0, V
DD
= +5 V 45 100 Ω
DIGITAL INPUTS AND OUTPUTS
Input Logic High V
IH
V
DD
= +5 V 2.4 V
Input Logic Low V
IL
V
DD
= +5 V 0.8 V
Input Logic High V
IH
V
DD
= +3 V 2.1 V
Input Logic Low V
IL
V
DD
= +3 V 0.6 V
Output Logic High V
OH
R
L
= 2.2 kΩ to V
DD
V
DD
–0.1 V
Output Logic Low V
OL
I
OL
= 1.6 mA, V
DD
= +5 V 0.4 V
Input Current I
IL
V
IN
= 0 V or +5 V, V
DD
= +5 V ±1 µA
Input Capacitance
6
C
IL
5pF
POWER SUPPLIES
Power Supply Range V
DD
Range 2.7 5.5 V
Supply Current (CMOS) I
DD
V
IH
= V
DD
or V
IL
= 0 V 0.01 5 µA
Supply Current (TTL)
8
I
DD
V
IH
= 2.4 V or V
IL
= 0.8 V, V
DD
= +5.5 V 0.9 4 mA
Power Dissipation (CMOS)
9
P
DISS
V
IH
= V
DD
or V
IL
= 0 V, V
DD
= +5.5 V 27.5 µW
Power Supply Sensitivity PSS ∆V
DD
= +5 V ± 10% 0.0002 0.001 %/%
PSS ∆V
DD
= +3 V ± 10% 0.006 0.03 %/%
DYNAMIC CHARACTERISTICS
6, 10
Bandwidth –3 dB BW_10K R
AB
= 10 kΩ 600 kHz
BW_100K R
AB
= 100 kΩ 71 kHz
Total Harmonic Distortion THD
W
V
A
=1 V rms + 2 V dc, V
B
= 2 V dc, f = 1 kHz 0.003 %
V
W
Settling Time t
S
_10K V
A
= V
DD
, V
B
= 0 V, ±1 LSB Error Band 2 µs
t
S
_100K V
A
= V
DD
, V
B
= 0 V, ±1 LSB Error Band 18 µs
Resistor Noise Voltage e
NWB
R
WB
= 5 kΩ, f = 1 kHz, RS = 0 9 nV/√Hz
R
WB
= 50 kΩ, f = 1 kHz, RS = 0 29 nV/√Hz
Crosstalk
11
C
T
V
A
= V
DD
, V
B
= 0 V –65 dB
INTERFACE TIMING CHARACTERISTICS Applies to All Parts
6, 12
Input Clock Pulsewidth t
CH
, t
CL
Clock Level High or Low 10 ns
Data Setup Time t
DS
5ns
Data Hold Time t
DH
5ns
CLK to SDO Propagation Delay
13
t
PD
R
L
= 2.2 kΩ, C
L
< 20 pF 1 25 ns
CS Setup Time t
CSS
10 ns
CS High Pulsewidth t
CSW
10 ns
Reset Pulsewidth t
RS
50 ns
CLK Fall to CS Rise Hold Time t
CSH
0ns
CS Rise to Clock Rise Setup t
CS1
10 ns
(V
DD
= +3 V ⴞ 10% or +5 V ⴞ 10%, V
A
= +V
DD
, V
B
= 0 V, –40ⴗC < T
A
< +85ⴗC unless
otherwise noted)