Datasheet
Data Sheet AD5172/AD5173
Rev. I | Page 9 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
B1
1
A1
2
W2
3
GND
4
V
DD
5
W1
10
B2
9
A2
8
SDA
7
SCL
6
AD5172
TOP VIEW
(Not to Scale)
04103-045
Figure 4. AD5172 Pin Configuration
Table 5. AD5172 Pin Function Descriptions
Pin
No.
Mnemonic Description
1 B1 B1 Terminal. GND ≤ V
B1
≤ V
DD
.
2 A1 A1 Terminal. GND ≤ V
A1
≤ V
DD
.
3 W2 W2 Terminal. GND ≤ V
W2
≤ V
DD
.
4 GND Digital Ground.
5 V
DD
Positive Power Supply. Specified for
operation from 2.7 V to 5.5 V. For OTP
programming, V
DD
needs to be a minimum
of 5.6 V but no more than 5.8 V and to be
capable of driving 100 mA.
6 SCL Serial Clock Input. Positive-edge triggered.
Requires a pull-up resistor. If this pin is driven
directly from a logic controller without a
pull-up resistor, ensure that the V
IH
minimum
is 0.7 V × V
DD
.
7 SDA Serial Data Input/Output. Requires a pull-up
resistor. If this pin is driven directly from a
logic controller without a pull-up resistor,
ensure that the V
IH
minimum is 0.7 V × V
DD
.
8 A2 A2 Terminal. GND ≤ V
A2
≤ V
DD
.
9 B2 B2 Terminal. GND ≤ V
B2
≤ V
DD
.
10 W1 W1 Terminal. GND ≤ V
W1
≤ V
DD
.
B1
1
AD0
2
W2
3
GND
4
V
DD
5
W1
10
B2
9
AD1
8
SDA
7
SCL
6
AD5173
TOP VIEW
(Not to Scale)
04103-046
Figure 5. AD5173 Pin Configuration
Table 6. AD5173 Pin Function Descriptions
Pin
No.
Mnemonic Description
1 B1 B1 Terminal. GND ≤ V
B1
≤ V
DD
.
2 AD0 Programmable Address Bit 0 for Multiple
Package Decoding.
3 W2 W2 Terminal. GND ≤ V
W2
≤ V
DD
.
4
GND
Digital Ground.
5
V
DD
Positive Power Supply. Specified for
operation from 2.7 V to 5.5 V. For OTP
programming, V
DD
needs to be a minimum
of 5.6 V but no more than 5.8 V and to be
capable of driving 100 mA.
6 SCL Serial Clock Input. Positive-edge triggered.
Requires a pull-up resistor. If this pin is driven
directly from a logic controller without a
pull-up resistor, ensure that the V
IH
minimum
is 0.7 V × V
DD
.
7 SDA Serial Data Input/Output. Requires a pull-up
resistor. If this pin is driven directly from a
logic controller without a pull-up resistor,
ensure that the V
IH
minimum is 0.7 V × V
DD
.
8 AD1 Programmable Address Bit 1 for Multiple
Package Decoding.
9
B2
B2 Terminal. GND ≤ V
B2
≤ V
DD
.
10 W1 W1 Terminal. GND ≤ V
W1
≤ V
DD
.