Datasheet

AD5171
Rev. D | Page 7 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
W 1
V
DD
2
GND 3
SCL
4
A 8
B
7
AD0
6
SDA
5
AD5171
TOP VIEW
(Not to Scale)
03437-003
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 W Wiper Terminal W. GND ≤ V
W
≤ V
DD
.
2 V
DD
Positive Power Supply. Specified for operation from 2.7 V to 5.5 V. For OTP programming, V
DD
needs to be within
the 4.75 V and 5.25 V range and capable of driving 100 mA.
3 GND Common Ground.
4 SCL
Serial Clock Input. Requires a pull-up resistor. If it is driven direct from a logic controller without the pull-up
resistor, ensure that the V
IH
minimum is 0.7 V × V
DD
.
5 SDA
Serial Data Input/Output. Requires a pull-up resistor. If it is driven direct from a logic controller without a pull-up
resistor, ensure that the V
IH
minimum is 0.7 V × V
DD
.
6 AD0 I
2
C Device Address Bit. Allows a maximum of two AD5171s to be addressed.
7 B Resistor Terminal B. GND ≤ V
B
≤ V
DD
.
8 A Resistor Terminal A. GND ≤ V
A
≤ V
DD
.