Datasheet

AD5170
Rev. G | Page 5 of 24
Parameter Symbol Conditions Min Typ
1
Max Unit
DYNAMIC CHARACTERISTICS
13
–3 dB Bandwidth BW_2.5k Code = 0x80 4.8 MHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms, V
B
= 0 V, f = 1 kHz 0.1 %
V
W
Settling Time t
S
V
A
= 5 V, V
B
= 0 V, ±1 LSB error
band
1 μs
Resistor Noise Voltage Density e
N_WB
R
WB
= 1.25 kΩ, f = 1 kHz 3.2 nV/√Hz
1
Typical specifications represent average readings at 25°C and V
DD
= 5 V.
2
Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
3
V
AB
= V
DD
, wiper (V
W
) = no connect.
4
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
A
= V
DD
and V
B
= 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
The A, B, and W resistor terminals have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
Measured at the A terminal. The A terminal is open circuited in shutdown mode.
8
The minimum voltage requirement on the V
IH
is 0.7 V × V
DD
. For example, V
IH
minimum = 3.5 V when V
DD
= 5 V. It is typical for the SCL and SDA resistors to be pulled
up to V
DD
. However, care must be taken to ensure that the minimum V
IH
is met when the SCL and SDA are driven directly from a low voltage logic controller without
pull-up resistors.
9
Different from operating power supply; power supply for OTP is used one time only.
10
Different from operating current; supply current for OTP lasts approximately 400 ms for use one time only.
11
See Figure 26 for the energy plot during OTP program.
12
P
DISS
is calculated from (I
DD
× V
DD
). CMOS logic level inputs result in minimum power dissipation.
13
All dynamic characteristics use V
DD
= 5 V.
ELECTRICAL CHARACTERISTICS: 10 kΩ, 50 kΩ, AND 100 kΩ
V
DD
= 5 V ± 10% or 3 V ± 10%, V
A
= V
DD
, V
B
= 0 V, −40°C < T
A
< +125°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ
1
Max Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity
2
R-DNL R
WB
, V
A
= no connect −1 ±0.1 +1 LSB
Resistor Integral Nonlinearity
2
R-INL R
WB
, V
A
= no connect −2.5 ±0.25 +2.5 LSB
Nominal Resistor Tolerance
3
∆R
AB
T
A
= 25°C −20 +20 %
Resistance Temperature Coefficient (∆R
AB
/R
AB
)/∆T 35 ppm/°C
R
WB
(Wiper Resistance) R
WB
Code = 0x00, V
DD
= 5 V 160 200 Ω
DC CHARACTERISTICS—POTENTIOMETER DIVIDER
MODE (SPECIFICATIONS APPLY TO ALL VRs)
Differential Nonlinearity
4
DNL −1 ±0.1 +1 LSB
Integral Nonlinearity
4
INL −1 ±0.3 +1 LSB
Voltage Divider Temperature Coefficient (∆V
W
/V
W
)/∆T Code = 0x80 15 ppm/°C
Full-Scale Error V
WFSE
Code = 0xFF −2.5 −1 0 LSB
Zero-Scale Error V
WZSE
Code = 0x00 0 1 2.5 LSB
RESISTOR TERMINALS
Voltage Range
5
V
A
, V
B
, V
W
GND V
DD
V
Capacitance A, Capacitance B
6
C
A
, C
B
f = 1 MHz, measured to GND,
code = 0x80
45 pF
Capacitance W
6
C
W
f = 1 MHz, measured to GND,
code = 0x80
60 pF
Shutdown Supply Current
7
I
A_SD
V
DD
= 5.5 V 0.01 1 μA
Common-Mode Leakage I
CM
V
A
= V
B
= V
DD
/2 1 nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High (SDA and SCL)
8
V
IH
V
DD
= 5 V 0.7 V
DD
V
DD
+ 0.5 V
Input Logic Low (SDA and SCL)
8
V
IL
V
DD
= 5 V −0.5 +0.3 V
DD
V
Input Logic High (AD0 and AD1) V
IH
V
DD
= 3 V 2.1 V
Input Logic Low (AD0 and AD1) V
IL
V
DD
= 3 V 0.6 V
Input Current I
IL
V
IN
= 0 V or 5 V ±1 μA
Input Capacitance
6
C
IL
5 pF