Datasheet

AD5160
Rev. B | Page 13 of 16
SPI INTERFACE
Table 6. Serial Data-Word Format
B7 B6 B5 B4 B3 B2
SDI
CLK
B1 B0
D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB
2
7
2
0
CS
VOUT
0
1
0
1
0
1
0
1
D7 D6 D5 D4 D3 D2 D1 D0
RDAC REGISTER LOAD
Figure 37. SPI Interface Timing Diagram
(V
A
= 5 V, V
B
= 0 V, V
W
= V
OUT
)
t
CSHO
t
CSS
t
CL
SDI
CLK
t
DS
t
CH
t
CS1
t
CSH1
t
CH
t
CSW
t
S
CS
VOUT
1
0
1
(DATA IN)
0
1
0
V
DD
0
±1LSB
Dx Dx
Figure 38. SPI Interface Detailed Timing Diagram (V
A
= 5 V, V
B
= 0 V, V
W
= V
OUT
)