Datasheet

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256-Position SPI-Compatible

Digital Potentiometer

AD5160

Rev. B

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FEATURES

256-position

End-to-end resistance: 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ

Compact SOT-23-8 (2.9 mm × 3 mm) package

SPI-compatible interface

Power-on preset to midscale

Single supply: 2.7 V to 5.5 V

Low temperature coefficient: 45 ppm/°C

Low power, I

= 8 μA

Wide operating temperature: –40°C to +125°C

Evaluation board available

APPLICATIONS

Mechanical potentiometer replacement in new designs

Transducer adjustment of pressure, temperature, position,

chemical, and optical sensors

RF amplifier biasing

Automotive electronics adjustment

Gain control and offset adjustment

FUNCTIONAL BLOCK DIAGRAM

SPI INTERFACE

WIPER

SDI

CLK

GND

Figure 1.

PIN CONFIGURATION

SDI

GND

CLK

TOP VIEW

(Not to Scale)

AD5160

Figure 2.

GENERAL DESCRIPTION

The AD5160 provides a compact 2.9 mm × 3 mm packaged

solution for 256-position adjustment applications. These

devices perform the same electronic adjustment function as

mechanical potentiometers

or variable resistors but with

enhanced resolution, solid-state reliability, and superior low

temperature coefficient performance.

The wiper settings are controllable through an SPI-compatible

digital interface. The resistance between the wiper and either

end point of the fixed resistor varies linearly with respect to the

digital code transferred into the RDAC latch.

Operating from a 2.7 V to 5.5 V power supply and consuming

less than 5 μA allows for usage in portable battery-operated

applications.

The terms digital potentiometer, VR, and RDAC are used interchangeably.

Summary of content (16 pages)

PAGE 1
256-Position SPI-Compatible Digital Potentiometer AD5160 FEATURES 256-position End-to-end resistance: 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Compact SOT-23-8 (2.9 mm × 3 mm) package SPI-compatible interface Power-on preset to midscale Single supply: 2.7 V to 5.5 V Low temperature coefficient: 45 ppm/°C Low power, IDD = 8 μA Wide operating temperature: –40°C to +125°C Evaluation board available FUNCTIONAL BLOCK DIAGRAM VDD A CS SPI INTERFACE SDI W CLK WIPER REGISTER GND Figure 1.
PAGE 2
AD5160 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................8 Applications ....................................................................................... 1 Test Circuits ..................................................................................... 12 Functional Block Diagram ..............................................................
PAGE 3
AD5160 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 kΩ VERSION VDD = 5 V ± 10%, or 3 V ± 10%; VA = +VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted. Table 1.
PAGE 4
AD5160 10 kΩ, 50 kΩ, 100 kΩ VERSIONS VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted. Table 2.
PAGE 5
AD5160 TIMING CHARACTERISTICS—ALL VERSIONS VDD = +5V ± 10%, or +3V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted. Table 3.
PAGE 6
AD5160 ABSOLUTE MAXIMUM RATINGS TA = +25°C, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4.
PAGE 7
AD5160 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS W 1 VDD 2 8 A AD5160 7 B 6 CS TOP VIEW CLK 4 (Not to Scale) 5 SDI GND 3 Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin 1 2 3 4 5 6 7 8 Mnemonic W VDD GND CLK SDI CS B A Description W Terminal. Positive Power Supply. Digital Ground. Serial Clock Input. Positive edge triggered. Serial Data Input. Chip Select Input, Active Low. When CS returns high, data loads into the DAC register. B Terminal. A Terminal. Rev.
PAGE 8
AD5160 TYPICAL PERFORMANCE CHARACTERISTICS 1.0 1.0 5V 0.8 POTENTIOMETER MODE DNL (LSB) RHEOSTAT MODE INL (LSB) –40°C +25°C +85°C +125°C 0.8 3V 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 32 64 96 128 160 192 224 256 0 32 64 CODE (Decimal) 160 192 224 256 Figure 7. DNL vs. Code, VDD = 5 V 1.0 1.0 0.8 0.8 5V 3V 0.6 POTENTIOMETER MODE INL (LSB) RHEOSTAT MODE DNL (LSB) 128 CODE (Decimal) Figure 4. R-INL vs. Code vs. Supply Voltages 0.4 0.
PAGE 9
AD5160 1.0 2.5 RHEOSTAT MODE INL (LSB) 0.6 2.0 ZSE, ZERO-SCALE ERROR (μA) –40 °C +25°C +85°C +125°C 0.8 0.4 0.2 0 –0.2 –0.4 –0.6 VDD = 5.5V 1.5 VDD = 2.7V 1.0 0.5 –0.8 0 –40 –1.0 0 32 64 96 128 160 192 224 256 0 80 120 Figure 13. Zero-Scale Error vs. Temperature Figure 10. R-INL vs. Code, VDD = 5 V 1.0 10 _40°C 0.8 +25°C +85°C +125°C 0.6 IDD SUPPLY CURRENT (μA) RHEOSTAT MODE DNL (LSB) 40 TEMPERATURE (°C) CODE (Decimal) 0.4 0.2 0 –0.2 –0.4 –0.6 VDD = 5.5V 1 VDD = 2.
PAGE 10
RHEOSTAT MODE TEMPCO (ppm/°C) AD5160 200 REF LEVEL 0.000dB 0 150 –6 0x80 –12 0x40 –18 0x20 100 /DIV 6.000dB 0x10 –24 50 MARKER 510 634.725Hz MAG (A/R) –9.049dB 0x08 –30 0x04 –36 0 0x02 0x01 –42 –48 –50 –54 0 32 64 96 128 160 192 224 256 –60 CODE (Decimal) 1k START 1 000.000Hz Figure 16. Rheostat Mode Tempco ∆RWB/∆T vs. Code 100k 1M STOP 1 000 000.000Hz Figure 19. Gain vs. Frequency vs. Code, RAB = 10 kΩ 160 POTENTIOMETER MODE TEMPCO (ppm/°C) 10k 140 REF LEVEL 0.
PAGE 11
AD5160 REF LEVEL –5.000dB /DIV 0.500dB –5.5 5kΩ – 1.026 MHz 10kΩ – 511 MHz 50kΩ – 101 MHz 100kΩ – 54 MHz –6.0 –6.5 –7.0 1 VW –7.5 –8.0 CLK –8.5 R = 50kΩ 2 R = 5kΩ –9.0 R = 10kΩ R = 100kΩ –9.5 Ch 1 200mV BW Ch 2 5.00 V BW M 100ns A CH2 3.00 V –10.0 –10.5 10k 100k 1M START 1 000.000Hz 10M STOP 1 000 000.000Hz Figure 22. –3 dB Bandwidth @ Code = 0x80 Figure 25.
PAGE 12
AD5160 TEST CIRCUITS Figure 28 to Figure 36 illustrate the test circuits that define the test conditions used in the product specification tables. 5V DUT A V+ = VDD 1LSB = V+/2N OP279 VIN W V+ B OFFSET GND VMS VOUT W A DUT B OFFSET BIAS Figure 28. Test Circuit for Potentiometer Divider Nonlinearity Error (INL, DNL) Figure 33. Test Circuit for Noninverting Gain NO CONNECT A DUT A IW W VMS –15V RSW = DUT W I W = VDD / RNOMINAL VW 0.1V ISW CODE = 0x00 W B B VMS1 VOUT Figure 34.
PAGE 13
AD5160 SPI INTERFACE 1 Table 6. Serial Data-Word Format B7 D7 MSB 27 B6 D6 B5 D5 B4 D4 SDI B3 D3 B2 D2 B1 D1 B0 D0 LSB 20 D7 0 D6 D5 D4 D3 D2 D1 D0 1 CLK 0 RDAC REGISTER LOAD 1 CS VOUT 0 1 0 Figure 37. SPI Interface Timing Diagram (VA = 5 V, VB = 0 V, VW = VOUT) 1 SDI (DATA IN) Dx Dx 0 tCH 1 tDS tCH tCS1 CLK 0 tCL tCSHO tCSH1 tCSS 1 CS tCSW 0 tS VDD VOUT ±1LSB 0 Figure 38. SPI Interface Detailed Timing Diagram (VA = 5 V, VB = 0 V, VW = VOUT) Rev.
PAGE 14
AD5160 THEORY OF OPERATION The AD5160 is a 256-position digitally controlled variable resistor (VR) device. The general equation determining the digitally programmed output resistance between W and B is An internal power-on preset places the wiper at midscale during power-on, which simplifies the fault condition recovery at power-up. PROGRAMMING THE VARIABLE RESISTOR Rheostat Operation The nominal resistance of the RDAC between Terminal A and Terminal B is available in 5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ.
PAGE 15
AD5160 PROGRAMMING THE POTENTIOMETER DIVIDER ESD PROTECTION Voltage Output Operation All digital inputs are protected with a series input resistor and parallel Zener ESD structures are shown in Figure 40 and Figure 41. This applies to SDI, CLK, and CS, which are the digital input pins. The digital potentiometer easily generates a voltage divider at wiper-to-B and wiper-to-A proportional to the input voltage at A-to-B.
PAGE 16
AD5160 OUTLINE DIMENSIONS 3.00 2.90 2.80 1.70 1.60 1.50 8 7 6 5 1 2 3 4 PIN 1 INDICATOR 3.00 2.80 2.60 0.65 BSC 1.95 BSC 0.15 MAX 0.05 MIN 1.45 MAX 0.95 MIN 0.22 MAX 0.08 MIN SEATING PLANE 0.38 MAX 0.22 MIN 8° 4° 0° 0.60 BSC COMPLIANT TO JEDEC STANDARDS MO-178-BA 0.60 0.45 0.30 121608-A 1.30 1.15 0.90 Figure 43.