Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Table of Contents
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Typical Performance Characteristics
- Test Circuits
- Theory of Operation
- RDAC Register and EEPROM
- Input Shift Register
- SPI Serial Data Interface
- Advanced Control Modes
- EEPROM or RDAC Register Protection
- INDEP Pin
- RDAC Architecture
- Programming the Variable Resistor
- Programming the Potentiometer Divider
- Terminal Voltage Operating Range
- Power-Up Sequence
- Layout and Power Supply Biasing
- Outline Dimensions

AD5122/AD5142 Data Sheet
Rev. 0 | Page 22 of 32
Table 10. Reduced Commands Operation Truth Table
Command
Number
Control
Bits[DB15:DB12]
Address
Bits[DB11:DB8]
1
Data Bits[DB7:DB0]
1
C3 C2 C1 C0 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Operation
0 0 0 0 0 X X X X X X X X X X X X NOP: do nothing.
1 0 0 0 1 0 0 0 A0 D7 D6 D5 D4 D3 D2 D1 D0
Write contents of serial register
data to RDAC
2 0 0 1 0 0 0 0 A0 D7 D6 D5 D4 D3 D2 D1 D0
Write contents of serial register
data to input register
3
0
0
1
1
X
0
A1
A0
X
X
X
X
X
X
D1
D0
Read back contents
D1 D0 Data
0 1 EEPROM
1 1 RDAC
9 0 1 1 1 0 0 0 A0 X X X X X X X 1 Copy RDAC register to EEPROM
10
0
1
1
1
0
0
0
A0
X
X
X
X
X
X
X
0
Copy EEPROM into RDAC
14 1 0 1 1 X X X X X X X X X X X X Software reset
15 1 1 0 0 A3 0 0 A0 X X X X X X X D0 Software shutdown
D0
Condition
0 Normal mode
1
Shutdown mode
1
X = don’t care.
Table 11. Reduced Address Bits Table
A3 A2 A1 A0 Channel Stored Channel Memory
1 X
1
X
1
X
1
All channels Not applicable
0 0 0 0 RDAC1 RDAC1
0 0 0 1 RDAC2 Not applicable
0 0 1 0 Not applicable RDAC2
1
X = don’t care.