Datasheet

Data Sheet AD5124/AD5144/AD5144A
Rev. A | Page 3 of 36
FUNCTIONAL BLOCK DIAGRAMS—TSSOP
V
DD
V
SS
GND
V
LOGIC
7/8
SPI
SERIAL
INTERFACE
SDO
SCLK
SDI
POWER-ON
RESET
SYNC
RDAC 1
INPUT
REGISTER 1
RDAC 2
INPUT
REGISTER 2
RDAC 3
INPUT
REGISTER 3
RDAC 4
INPUT
REGISTER 4
EEPROM
MEMORY
A
1
W
1
B
1
A
2
W
2
B
2
A
3
W
3
B
3
A
4
W
4
B
4
AD5124/AD5144
10877-002
Figure 2. AD5124/AD5144 20-Lead TSSOP
V
DD
V
SS
GND
V
LOGIC
8
I
2
C
SERIAL
INTERFACE
ADDR
SCL
SDA
POWER-ON
RESET
RESET
RDAC 1
INPUT
REGISTER 1
RDAC 2
INPUT
REGISTER 2
RDAC 3
INPUT
REGISTER 3
RDAC 4
INPUT
REGISTER 4
EEPROM
MEMORY
A
1
W
1
B
1
A
2
W
2
B
2
A
3
W
3
B
3
A
4
W
4
B
4
AD5144A
10877-003
Figure 3. AD5144A 20-Lead TSSOP