Datasheet

AD5124/AD5144/AD5144A Data Sheet
Rev. A | Page 24 of 36
Daisy-Chain Connection
Daisy chaining minimizes the number of port pins required from
the controlling IC. As shown in Figure 43, the SDO pin of one
package must be tied to the SDI pin of the next package. The clock
period may need to be increased because of the propagation
delay of the line between subsequent devices. When two AD5124/
AD5144 devices are daisy chained, 32 bits of data are required.
The first 16 bits are assigned to U2, and the second 16 bits are
assigned to U1, as shown in Figure 44. Keep the
SYNC
pin low
until all 32 bits are clocked into their respective serial registers.
The
SYNC
pin is then pulled high to complete the operation.
To prevent data from mislocking (for example, due to noise) the
part includes an internal counter, if the SCLK falling edges count is
not a multiple of 8, the part ignores the command. A valid clock
count is 16, 24, 32, 40, and so on. The counter resets when
SYNC
returns high.
MOSI
SSSCLKMISO
MICROCONTROLLER
SDI SDO
SCLK
SCLK
R
P
2.2kΩ
R
P
2.2kΩ
SDI SDO
U1 U2
AD5124/
AD5144
AD5124/
AD5144
SYNC
V
LOGIC
SYNC
DAISY-CHAIN
V
LOGIC
10877-046
Figure 43. Daisy-Chain Configuration
DB15
SCLK
SYNC
MOSI
12 16
DB0
DB15
SDO_U1
32
DB15
DB0 DB15
DB0
17
18
DB0
INPUT WORD FOR U2 INPUT WORD FOR U1
INPUT WORD FOR U2
UNDEFINED
10877-047
Figure 44. Daisy-Chain Diagram