Datasheet

AD5124/AD5144/AD5144A Data Sheet
Rev. A | Page 2 of 36
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Functional Block Diagrams—TSSOP ............................................ 3
Specifications ..................................................................................... 4
Electrical Characteristics—AD5124 .......................................... 4
Electrical Characteristics—AD5144 and AD5144A ................ 7
Interface Timing Specifications ................................................ 10
Shift Register and Timing Diagrams ....................................... 11
Absolute Maximum Ratings .......................................................... 13
Thermal Resistance .................................................................... 13
ESD Caution ................................................................................ 13
Pin Configurations and Function Descriptions ......................... 14
Typical Performance Characteristics ........................................... 17
Test Circuits ..................................................................................... 22
Theory of Operation ...................................................................... 23
RDAC Register and EEPROM .................................................. 23
Input Shift Register .................................................................... 23
Serial Data Digital Interface Selection, DIS ............................ 23
SPI Serial Data Interface ............................................................ 23
I
2
C Serial Data Interface ............................................................ 25
I
2
C Address .................................................................................. 25
Advanced Control Modes ......................................................... 27
EEPROM or RDAC Register Protection ................................. 28
Load RDAC Input Register (
LRDAC
) ..................................... 28
RDAC Architecture .................................................................... 31
Programming the Variable Resistor ......................................... 31
Programming the Potentiometer Divider ............................... 32
Terminal Voltage Operating Range ......................................... 32
Power-Up Sequence ................................................................... 32
Layout and Power Supply Biasing ............................................ 32
Outline Dimensions ....................................................................... 33
Ordering Guide .......................................................................... 34
REVISION HISTORY
12/12—Rev. 0 to Rev. A
Changes to Table 12 and Table 13 ................................................ 25
10/12—Revision 0: Initial Version