Datasheet

AD5121/AD5141 Data Sheet
Rev. A | Page 28 of 32
If the part is configured in linear gain setting mode, the resistance
between Terminal W and Terminal A is directly proportional
to the code loaded in the associate RDAC register. The general
equations for this operation are
AD5121:
W
ABAW
RR
D
DR +×=
128
)(
From 0x00 to 0x7F (5)
AD5141:
W
AB
AW
R
R
D
D
R +
×=
256
)
(
From 0x00 to 0xFF (6)
where:
D is the decimal equivalent of the binary code in the 7-bit/8-bit
RDAC register.
R
AB
is the end-to-end resistance.
R
W
is the wiper resistance.
In the bottom scale condition or top scale condition, a finite
total wiper resistance of 40 Ω is present. Regardless of which
setting the part is operating in, limit the current between
Terminal A to Terminal B, Terminal W to Terminal A, and
Terminal W to Terminal B, to the maximum continuous current
of ±6 mA or to the pulse current specified in Table 7. Otherwise,
degradation or possible destruction of the internal switch
contact can occur.
Calculate the Actual End-to-End Resistance
The resistance tolerance is stored in the internal memory during
factory testing. Therefore, the actual end-to-end resistance can
be calculated (which is valuable for calibration, tolerance matching,
and precision applications).
The resistance tolerance (in percentage) is stored in fixed point
format, using a 16-bit sign magnitude binary. The sign bit
(0 = negative and 1 = positive) and the integer part are located
in Address 0x02, as shown in Table 19. Address 0x03 contains
the fractional part, as shown in Table 19.
That is, if the data readback from Address 0x02 is 00000010, and
the data readback from Address 0x03 is 10110000, the end-to-end
resistance can be calculated as follows.
For Memory Map Address 0x02, DB[7] = 0 = negative, and
DB[6:0] = 0000010 = 2.
For Memory Map Address 0x03, DB[7:0] = 10110000 = 176 × 2
−8
=
0.6875, and therefore, tolerance = −2.6875%, and R
AB
= 9.731 kΩ.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer easily generates a voltage divider at
wiper-to-B and wiper-to-A that is proportional to the input voltage
at A to B, as shown in Figure 43.
W
A
B
V
A
V
OUT
V
B
10940-050
Figure 43. Potentiometer Mode Configuration
Connecting Terminal A to 5 V and Terminal B to ground
produces an output voltage at the Wiper W to Terminal B
ranging from 0 V to 5 V. The general equation defining the
output voltage at V
W
with respect to ground for any valid
input voltage applied to Terminal A and Terminal B is
B
AB
AW
A
AB
WB
W
V
R
DR
V
R
DR
D
V ×+
×=
)
(
)(
)
(
(7)
where:
R
WB
(D) can be obtained from Equation 1 and Equation 2.
R
AW
(D) can be obtained from Equation 3 and Equation 4.
Operation of the digital potentiometer in the divider mode
results in a more accurate operation over temperature. Unlike
the rheostat mode, the output voltage is dependent mainly on
the ratio of the internal resistors, R
AW
and R
WB
, and not the
absolute values. Therefore, the temperature drift reduces to
5 ppm/°C.
Table 19. End-to-End Resistance Tolerance Bytes
Data Byte
Memory Map Address DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0x02 Sign 2
6
2
5
2
4
2
3
2
2
2
1
2
0
0x03 2
−1
2
−2
2
−3
2
−4
2
−5
2
−6
2
−7
2
−8