Datasheet

AD5110/AD5112/AD5114 Data Sheet
Rev. B | Page 24 of 28
RDAC ARCHITECTURE
To achieve optimum performance, Analog Devices, Inc., has
patented the RDAC segmentation architecture for all the digital
potentiometers. In particular, the AD5110/AD5112/AD5114
employ a two-stage segmentation approach as shown in
Figure 46. The AD5110/AD5112/AD5114 wiper switch is
designed with the transmission gate CMOS topology and with
the gate voltage derived from V
DD
.
R
L
R
L
R
L
R
L
R
S
W
R
S
A
B
BS
6-BIT/7-BIT/8-BIT
ADDRESS
DECODER
TS
09582-046
Figure 46. AD5110/AD5112/AD5114 Simplified RDAC Circuit
Top Scale/Bottom Scale Architecture
In addition, the AD5110/AD5112/AD5114 include a new
feature to reduce the resistance between terminals. These extra
steps are called bottom scale and top scale. At bottom scale, the
typical wiper resistance decreases from 70 Ω to 45 Ω. At top
scale, the resistance between Terminal A and Terminal W is
decreased by 1 LSB, and the total resistance is reduced to 70 Ω.
The extra steps are not equal to 1 LSB and are not included in
the INL, DNL, R-INL, and R-DNL specifications.
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation—±8% Resistor Tolerance
The AD5110/AD5112/AD5114 operate in rheostat mode when
only two terminals are used as a variable resistor. The unused
terminal can be floating or tied to the Terminal W as shown in
Figure 47.
A
W
B
A
W
B
A
W
B
09582-047
Figure 47. Rheostat Mode Configuration
The nominal resistance between Terminal A and Terminal B,
R
AB, is available in 5 kΩ, 10 kΩ, and 80 kΩ and has 32/64/128
tap points accessed by the wiper terminal. The 5-/6-/7-bit data
in the RDAC latch is decoded to select one of the 32/64/128
possible wiper settings. The general equations for determining
the digitally programmed output resistance between the W
terminal and B terminal are
AD5110:
BS
WB
R
R =
Bottom scale (0xFF) (1)
W
AB
WB
RR
D
DR +×=
128
)(
From 0x00 to 0x80 (2)
AD5112:
BS
WB
R
R =
Bottom scale (0xFF) (3)
W
AB
WB
RR
D
DR +×=
64
)(
From 0x00 to 0x40 (4)
AD5114:
BS
WB
RR
=
Bottom scale (0xFF) (5)
W
AB
WB
RR
D
DR +×=
32
)(
From 0x00 to 0x20 (6)
where:
D is the decimal equivalent of the binary code in the 5-/6-/7-bit
RDAC register.
R
AB
is the end-to-end resistance.
R
W
is the wiper resistance.
R
BS
is the wiper resistance at bottom scale