Datasheet

AD5110/AD5112/AD5114 Data Sheet
Rev. B | Page 12 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
T
O
P
VIEW
(Not to Scale)
AD5
1
10/
AD5112/
AD5
1
14
3
W
4B
1V
DD
2
A
6
SC
L
5
GND
8
V
LOGIC
7
SD
A
09582-004
NOTES
1. THE EXPOSED PAD IS INTERNALL
Y
FLO
A
TING.
Figure 4. Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Positive Power Supply; 2.3 V to 5.5 V. This pin should be decoupled with 0.1 µF ceramic capacitors and 10 µF
capacitors.
2 A Terminal A of RDAC. GND ≤ V
A
≤ V
DD
.
3 W Wiper Terminal of RDAC. GND ≤ V
W
≤ V
DD
.
4 B Terminal B of RDAC. GND ≤ V
B
≤ V
DD
.
5 GND Ground Pin, Logic Ground Reference.
6 SCL Serial Clock Line. This pin is used in conjunction with the SDA line to clock data into or out of the 16-bit input
registers.
7 SDA Serial Data Line. This pin is used in conjunction with the SCL line to clock data into or out of the 16-bit input
registers. It is a bidirectional, open-drain data line that should be pulled to the supply with an external pull-up
resistor.
8 V
LOGIC
Logic Power Supply; 1.8 V to V
DD
. This pin should be decoupled with 0.1
µ
F ceramic capacitors and 10
µ
F
capacitors.
EPAD Exposed Pad. The exposed pad is internally floating.