Datasheet
Data Sheet AD5111/AD5113/AD5115
Rev. | Page 19 of 24
RDAC ARCHITECTURE
To achieve optimum performance, Analog Devices, Inc., has
patented the RDAC segmentation architecture for all the digital
potentiometers. In particular, the AD5111/AD5113/AD5115
employ a two-stage segmentation approach as shown in
Figure 42. The AD5111/AD5113/AD5115 wiper switch is
designed with the transmission gate CMOS topology and with
the gate voltage derived from V
DD
.
R
L
R
L
R
L
R
L
R
S
W
R
S
A
B
BS
5-BIT/6-BIT/7-BIT
ADDRESS
DECODER
TS
09654-043
Figure 42. AD5111/AD5113/AD5115 Simplified RDAC Circuit
Low Wiper Resistance Feature
In addition, the AD5111/AD5113/AD5115 include a new
feature to reduce the resistance between terminals. These extra
steps are called bottom scale and top scale. At bottom scale, the
typical wiper resistance decreases from 70 Ω to 45 Ω. At top
scale, the resistance between Terminal A and Terminal W is
decreased by 1 LSB and the total resistance is reduced to 70 Ω.
The extra steps are not equal to 1 LSB and are not included in
the INL, DNL, R-INL, and R-DNL specifications.
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation—±8% Resistor Tolerance
The AD5111/AD5113/AD5115 operate in rheostat mode when
only two terminals are used as a variable resistor. The unused
terminal can be floating or tied to the W terminal as shown in
Figure 43.
A
W
B
A
W
B
A
W
B
09654-044
Figure 43. Rheostat Mode Configuration
The nominal resistance between Terminal A and Terminal B,
R
AB
, is available in 5 k, 10 k, and 80 k and has 128/64/32
tap points accessed by the wiper terminal. The 5-/6-/7-bit data
in the RDAC latch is decoded to select one of the 128/64/32
possible wiper settings. The general equations for determining
the digitally programmed output resistance between the W
terminal and B terminal are
AD5111:
BS
WB
RR
Bottom scale (1)
W
AB
WB
RR
D
DR
128
)(
From 0 to 128 (2)
AD5113:
BS
WB
RR
Bottom scale (3)
W
AB
WB
RR
D
DR
64
)(
From 0 to 64 (4)
AD5115:
BS
WB
RR
Bottom scale (5)
W
AB
WB
RR
D
DR
32
)(
From 0 to 32 (6)
where:
D is the decimal equivalent of the binary code in the 5-/6-/7-bit
RDAC register; 128, 64, and 32 refer to the top scale step.
R
AB
is the end-to-end resistance.
R
W
is the wiper resistance.
R
BS
is the wiper resistance at bottom scale.
A