Datasheet

Data Sheet AD5111/AD5113/AD5115
Rev. | Page 11 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD5111/
AD5113/
AD5115
3W
4B
1V
DD
2A
6 CLK
5 GND
TOP VIEW
(Not to Scale)
8 CS
7 U/D
09654-006
NOTES
1. THE EXPOSED PAD IS INTERNALLY
FLOATING.
Figure 5. Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Positive Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors.
2 A Terminal A of RDAC. GND ≤ V
A
≤ V
DD
.
3 W Wiper Terminal of RDAC. GND ≤ V
W
≤ V
DD
.
4
B
Terminal B of RDAC. GND ≤ V
B
≤ V
DD
.
5
GND
Ground Pin, Logic Ground Reference.
6
CLK
Clock Input. Each clock pulse executes the step-up or step-down of the resistance. The direction is determined
by the state of the U/
D
pin.
CLK
is a negative edge trigger. Data can be transferred at rates up to 50 MHz.
7 U/
D
Up/Down Selection Counter Control.
8
CS
Chip Select. Active Low.
EPAD Exposed Pad. The exposed pad is internally floating.
A