Datasheet

AD5066
Rev. A | Page 13 of 24
0
–20
–50
–80
–100
5 10 30 40 55
06845-016
V
OUT
LEVEL (dB)
FREQUENCY (kHz)
–90
–70
–60
–10
–30
–40
20 50
V
DD
= 5V,
T
A
= 25ºC
DAC LOADED WITH MIDSCALE
V
REF
= 3.0V ± 200mV p-p
Figure 34. Total Harmonic Distortion
CH1 5.00V CH2 2.00V M2.00ms A CH1 1.80V
T 10.20%
CLR
V
OUT
06845-135
Figure 35. Hardware
CLR
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4
OUTPUT VOLTAGE (V)
TIME (µs)
3/4 TO 1/4
1/4 TO 3/4
06845-136
V
DD
= 4.5V
V
REF
= 4.096V
T
A
= 25°C
Figure 36. Slew Rate
CH1 50.0mV CH2 5.00V M4.00µs A CH2 1.80V
T 9.800%
LAST SCLK
V
OUT
CH1 PEAK TO PEAK
155mV
06845-137
V
DD
= 5V
V
REF
= 4.096V
T
A
= 25°C
Figure 37. Glitch Upon Entering Power Down
CH1 50.0mV CH2 5.00V M4.00µs A CH2 1.80V
T 9.800%
LAST SCLK
V
OUT
CH1 PEAK TO PEAK
159mV
06845-138
V
DD
= 5V
V
REF
= 4.096V
T
A
= 25°C
Figure 38. Glitch Upon Exiting Power Down