Datasheet

AD5024/AD5044/AD5064 Data Sheet
Rev. F | Page 14 of 28
7
4
1
–1
–4
0 2.5 5.0 7.5 10.0
06803-043
GLITCH AMPLITUDE (mV)
TIME (μs)
5
6
3
2
0
–2
–3
V
DD
= 5V, V
REF
= 4.096V
T
A
= 25ºC
Figure 32. Analog Crosstalk
7
4
1
–1
–4
0 2.5 5.0 7.5 10.0
06803-044
GLITCH AMPLITUDE (mV)
TIME (μs)
5
6
3
2
0
–2
–3
V
DD
= 5V, V
REF
= 4.096V
T
A
= 25°C
Figure 33. DAC-to-DAC Crosstalk
06803-045
4s/DIV
1μV/DIV
V
DD
= 5V, V
REF
= 4.096V
T
A
= 25ºC
DAC LOADED WITH MIDSCALE
Figure 34. 0.1 Hz to 10 Hz Output Noise Plot
0
–20
–50
–80
–100
5 10 30 40 55
06803-046
V
OUT
LEVEL (dB)
FREQUENCY (kHz)
–90
–70
–60
–10
–30
–40
20 50
V
DD
= 5V,
T
A
= 25ºC
DAC LOADED WITH MIDSCALE
V
REF
= 3.0V ± 200mV p-p
Figure 35. Total Harmonic Distortion
24
20
14
8
4
0 1 5 7 10
06803-047
SETTLING TIME (μs)
CAPACITANCE (nF)
6
10
12
22
18
16
3 92 4
6
8
V
DD
= 5V, V
REF
= 3.0V
T
A
= 25°C
1/4 SCALE TO 3/4 SCALE
WITHIN ±1LSB
Figure 36. Settling Time vs. Capacitive Load
06803-048
CH1 5V CH2 2V M2µs A CH1 2.5V
2
1
T 11%
V
DD
= 5V
V
REF
= 4.096V
T
A
= 25ºC
DAC A
CLR
Figure 37. Hardware
CLR