Datasheet

AD2S83–SPECIFICATIONS
Parameter Conditions Min Typ Max Unit
THREE-STATE LEAKAGE DB1–DB16 Only
Current I
L
±V
S
= ±12.0 V, V
L
= 5.5 V  20 µA
V
OL
= 0 V
±V
S
= ±12.0 V, V
L
= 5.5 V  20 µA
V
OH
= 5.0 V
RATIO MULTIPLIER
AC Error Output Scaling 10 Bit 177.6 mV/Bit
12 Bit 44.4 mV/Bit
14 Bit 11.1 mV/Bit
16 Bit 2.775 mV/Bit
PHASE SENSITIVE DETECTOR
Output Offset Voltage 12 mV
Gain
In Phase w.r.t. REF –0.882 –0.9 –0.918 V rms/V dc
In Quadrature w.r.t. REF ±0.02 V rms/V dc
Input Bias Current 60 150 nA
Input Impedance 1.0 MΩ
Input Voltage ±8V
INTEGRATOR
Open-Loop Gain At 10 kHz 57 60 63 dB
Dead Zone Current (Hysteresis) 90 100 110 nA/LSB
Input Offset Voltage 15 mV
Input Bias Current 60 150 nA
Output Voltage Range 8 V
VCO
Maximum Rate 1.1 MHz
VCO Rate +ve DIR 8.25 8.50 8.75 kHz/µA
–ve DIR 8.25 8.50 8.75 kHz/µA
VCO Power Supply Sensitivity
Rate +V
S
+0.5 %/V
–V
S
–0.5 %/V
Input Offset Voltage 3mV
Input Bias Current 12 50 nA
Input Bias Current Tempco +0.22 nA/°C
Linearity of Absolute Rate
AD2S83AP
0 kHz–500 kHz ±0.15 0.25 % FSR
0.5 MHz–1 MHz ±0.25 1.0 % FSR
AD2S83IP
0 kHz–500 kHz ±0.25 0.5 % FSR
0.5 MHz–1 MHz ±0.25 1.0 % FSR
Reversion Error
AD2S83AP ±0.5 1.0 % Output
AD2S83IP ±1.0 1.5 % Output
POWER SUPPLIES
Voltage Levels
+V
S
+11.4 +12.6 V
–V
S
–11.4 –12.6 V
+V
L
+4.5 +5 +V
S
V
Current
±I
S
±V
S
@ ±12 V ±12 23 mA
±I
S
±V
S
@ ±12.6 V ±19 30 mA
±I
L
+V
L
@ ±5.0 V ±0.5 1.5 mA
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test.
Specifications subject to change without notice.
(V
S
= 12 V dc  5%; V
L
= 5 V dc  10%; T
A
= –40C to +85C)
ORDERING GUIDE
Temperature Package Package
Model Range Accuracy Description Option
AD2S83AP –40°C to +85°C 8 arc min Plastic Leaded Chip Carrier P-44A
AD2S83IP –40°C to +85°C 8 arc min Plastic Leaded Chip Carrier P-44A
REV. E
–4–