Datasheet

AD2S1200
Rev. 0 | Page 15 of 24
t
11
t
SCLK
t
10
t
9
t
8
04406-0-008
SCLK
SO
MSB MSB–1 LSB RDVEL DOS LOT PAR
RD
t
3
t
6
t
7
t
CK
CLKIN
SO
VELPOS
t
2
SAMPLE
CS
RD
RDVEL
t
1
t
1
t
3
t
5
t
4
t
5
t
4
t
7
t
6
Figure 8. Serial Port Read Timing
Table 6. Serial Port Timing
Parameter Description Min Typ Max
t
8
MSB Read Time from RD
/CS to SCLK
15 ns t
SCLK
t
9
Enable Time RD
/CS to DB Valid
12 ns
t
10
Delay SCLK to DB Valid 14 ns
t
11
Disable Time RD
/CS to DB High Z
18 ns
t
SCLK
Serial Clock Period (25 MHz Max) 40 ns