Datasheet

ORDERING GUIDE
Model Temperature Range Package Descriptions Package Options
AD22057N –40°C to +125°C Plastic DIP N-8
AD22057R –40°C to +125°C Plastic SOIC SO-8
AD22057R-Reel –40°C to +125°C Tape and Reel SO-8*
*Quantities must be in increments of 2,500 pieces each.
AD22057–SPECIFICATIONS
REV. A
–2–
(T
A
= +25ⴗC, V
S
= +5 V, V
CM
= 0, R
L
= 10 k⍀ unless otherwise noted)
Parameter Comments Test Conditions Min Typ Max Units
INPUTS (PINS 1 AND 8)
+CMR Positive Common-Mode Range T
A
= T
MIN
to T
MAX
+24 V
CMR Negative Common-Mode Range T
A
= T
MIN
to +85°C –1.0 V
CMRR
LF
Common-Mode Rejection Ratio f ≤ 10 Hz 80 90 dB
CMRR
HF
Common-Mode Rejection Ratio f = 1 kHz 80 90 dB
R
INCM
Common-Mode Input Resistance Pin 1 or Pin 8 to Pin 2 180 240 300 kΩ
R
MATCH
Matching of Resistances ±0.5 %
R
INDIFF
Differential Input Resistance Pin 1 to Pin 8 280 400 kΩ
PREAMPLIFIER
G
CL
Closed-Loop Gain
1
9.7 10.0 10.3 V/V
V
O
Output Voltage Range (Pin 3) +0.01 +4.8 V
R
O
Output Resistance
2
97 100 103 kΩ
OUTPUT BUFFER
G
CL
Closed-Loop Gain
1
R
LOAD
≥ 10 kΩ 1.94 2.0 2.06 V/V
V
O
Output Voltage Range
3
+0.02 +4.8 V
R
O
Output Resistance (Pin 5) V
O
≥ 0.1 V dc 2.0 Ω
OVERALL SYSTEM
G Gain
1
V
O
≥ 0.1 V dc 19.9 20.0 20.1 V/V
Gain Drift T
A
= T
MIN
to T
MAX
–62.5 +62.5 ppm/°C
V
OS
Input Offset Voltage
4
–1 0.03 1 mV
Offset Drift T
A
= T
MIN
to T
MAX
–12.5 +12.5 µV/°C
OFS Midscale Offset (Pin 7) Scaling 0.49 0.50 0.51 V/V
Input Resistance Pin 7 to Pin 2 2.5 3.0 kΩ
I
OSC
Short-Circuit Output Current 7 11 25 mA
T
A
= T
MIN
to T
MAX
527mA
BW
–3 dB
–3 dB Bandwidth V
O
= +1 V dc 20 30 kHz
SR Slew Rate 0.2 V/µs
N
SD
Noise Spectral Density
4
f = 100 Hz to 10 kHz 0.2 µV/√Hz
PSR Power Supply Rejection V
S
= 5 V, V
O
= 1 V to 4.2 V
V
S
= 24 V, V
O
= 1 V to 22 V
T
A
= T
MIN
to T
MAX
V
OS
Input Offset Voltage
4
20.0 µV/V
G Gain 0.05 %/V
POWER SUPPLY
V
S
Operating Range T
A
= T
MIN
to T
MAX
3536V
I
S
Quiescent Supply Range
5
T
A
= +25°C, V
S
= +5 V 200 500 µA
TEMPERATURE RANGE
T
OP
Operating Temperature Range –40 +125 °C
PACKAGE Plastic Mini-DIP (N-8) AD22057N
Plastic SOIC (SO-8) AD22057R
NOTES
1
Specified for default mode i.e., with no external components. The overall gain is trimmed to ±0.5% while the individual gains of A1 and A2 may be subject to a
maximum ±3% tolerance. Note that the actual gain in a particular application can be modified by the use of external resistor networks.
2
The actual output resistance of A1 is only a few ohms, but access to this output, via Pin 3, is always through a 100 kΩ resistor, which is trimmed to ±3%.
3
For V
CM
≤ 20 V. For V
CM
> 20 V, V
OL
⯝ 1 mV/V × V
CM
.
4
Referred to the input (Pins 1 and 8).
5
With V
DM
= 0 V. Differential mode signals are referred to as V
DM
, while V
CM
refers to common-mode voltages.
Specifications subject to change without notice.