Datasheet
REV. A
AD1896
–23–
TDM MODE APPLICATION
In TDM mode, several AD1896s can be daisy-chained together
and connected to the serial input port of a SHARC
DSP. The
AD1896 contains a 64-bit parallel load shift register. When the
LRCLK_O pulse arrives, each AD1896 parallel loads its left and
right data into the 64-bit shift register. The input to the shift
register is connected to TDM_IN, while the output is connected
to SDATA_O. By connecting the SDATA_O to the TDM_IN
of the next AD1896, a large shift register is created, which is
clocked by SCLK_O.
The number of AD1896s that can be daisy-chained together is
limited by the maximum frequency of SCLK_O, which is about
25 MHz. For example, if the output sample rate, f
S
, is 48 kHz,
up to eight AD1896s could be connected since 512 ¥ f
S
is less
than 25 MHz. In master/TDM mode, the number of AD1896s
that can be daisy-chained is fixed to four.
MSB
1/f
s
TDM MODE – 16 BITS TO 24 BITS PER CHANNEL
LEFT CHANNEL
RIGHT CHANNEL
LEFT CHANNEL
LEFT CHANNEL
RIGHT CHANNEL
RIGHT CHANNEL
MSB
LSB
LSB
LSB
LSB
LSB
LSB
MSB
LSB
MSB LSB
LRCLK
SCLK
SDATA
LRCLK
SCLK
SDATA
LRCLK
SCLK
SDATA
LRCLK
SCLK
SDATA
NOTES
1
LRCLK NORMALLY OPERATES AT ASSOCIATIVE INPUT OR OUTPUT SAMPLE FREQUENCY (f
s
).
2
SCLK FREQUENCY IS NORMALLY 64 LRCLK EXCEPT FOR TDM MODE WHICH IS N 64 f
s
,
WHERE N = NUMBER OF STEREO CHANNELS IN THE TDM CHAIN, IN MASTER MODE N = 4.
3
PLEASE NOTE THAT 8 BITS OF EACH 32-BIT SUBFRAME ARE USED FOR TRANSMITTING
MATCHED-PHASE MODE DATA. PLEASE REFER TO FIGURE 14.
MSB
MSB
MSB
MSB
MSBMSB
MSB
I
2
S MODE – 16 BITS TO 24 BITS PER CHANNEL
RIGHT-JUSTIFIED MODE – SELECT NUMBER OF BITS PER CHANNEL
LEFT-JUSTIFIED MODE – 16 BITS TO 24 BITS PER CHANNEL
Figure 10. Input/Output Serial Data Formats
AD1896
TDM_IN
SDATA_O
LRCLK_O
PHASE-MASTER
M1 M2 M0
0 0 0
SCLK_O
SHARC
DSP
DR0
RFS0
RCLK0
SLAVE-1 SLAVE-n
STANDARD MODE
MATCHED-PHASE MODE
AD1896
TDM_IN
SDATA_O
LRCLK_O
M1 M2 M0
0 0 0
0 1 0
SCLK_O
AD1896
TDM_IN
SDATA_O
LRCLK_O
M1 M2 M0
SCLK_O
0 0 0
0 1 0
SCLK
LRCLK
Figure 11. Daisy-Chain Configuration for TDM Mode (All AD1896s Being Clock-Slaves)