Datasheet

DIGITAL I/O
Min Typ Max Unit
Input Voltage HI (V
IH
) 2.4 V
Input Voltage LO (V
IL
) 0.8 V
Input Leakage (I
IH
@ V
IH
= 5 V) 10 µA
Input Leakage (I
IL
@ V
IL
= 0 V) 10 µA
Output Voltage HI (V
OH
@ I
OH
= –2 mA) 2.4 V
Output Voltage LO (V
OL
@ I
OL
= 2 mA) 0.4 V
Input Capacitance 15 pF
DIGITAL TIMING (Guaranteed over 0°C to 70°C, DV
DD
= AV
DD
= 5 V ± 5%. Refer to Figures 17–19.)
Min Typ Max Unit
t
CLKIN
CLKIN Period 48 81 780 ns
F
CLKIN
CLKIN Frequency (1/t
CLKIN
) 1.28 12.288 20.48 MHz
t
CPWL
CLKIN LO Pulsewidth 15 ns
t
CPWH
CLKIN HI Pulsewidth 15 ns
t
RPWL
RESET LO Pulsewidth 50 ns
t
BPWL
BCLK LO Pulsewidth 15 ns
t
BPWH
BCLK HI Pulsewidth 15 ns
t
DLYCKB
CLKIN Rise to BCLK Xmit (Master Mode) 15 ns
t
DLYBLR
BCLK Xmit to LRCK Transition (Master Mode) 15 ns
t
DLYBWR
BCLK Xmit to WCLK Rise 10 ns
t
DLYBWF
BCLK Xmit to WCLK Fall 10 ns
t
DLYDT
BCLK Xmit to Data/Tag Valid (Master Mode) 10 ns
t
SETLRBS
LRCK Setup to BCLK Sample (Slave Mode) 10 ns
t
DLYLRDT
LRCK Transition to Data/TAG Valid (Slave Mode)
No MSB Delay Mode (for MSB Only) 40 ns
t
SETWBS
WCLK Setup to BCLK Sample (Slave Mode)
Data Position Controlled by WCLK Input Mode 10 ns
t
DLYBDT
BCLK Xmit to DATA/TAG Valid (Slave Mode)
All Bits Except MSB in No MSB Delay Mode
All Bits in MSB Delay Mode 10 ns
POWER
Min Typ Max Unit
Supplies
Voltage, Analog and Digital 4.75 5 5.25 V
Analog Current 35 43 mA
Analog Current—Power Down (CLKIN Running) 6 26 µA
Digital Current 16 20 mA
Digital Current—Power Down (CLKIN Running) 13 39 µA
Dissipation
Operation—Both Supplies 255 315 mW
Operation—Analog Supply 175 215 mW
Operation—Digital Supply 80 100 mW
Power Down—Both Supplies (CLKIN Running) 95 325 µW
Power Down—Both Supplies (CLKIN Not Running) 5 µW
Power Supply Rejection (See TPC 5)
1 kHz 300 mV p-p Signal at Analog Supply Pins 76 dB
20 kHz 300 mV p-p Signal at Analog Supply Pins 71 dB
Stopband (≥0.55 × F
S
)—any 300 mV p-p Signal 80 dB
AD1877
REV. A
–3–