Datasheet

AD1836A Data Sheet
Rev. A | Page 14 of 24
LRCLK
BCLK
SDATA
LRCLK
BCLK
SDATA
LRCLK
BCLK
SDATA
LRCLK
BCLK
SDATA
LEFT CHANNEL RIGHT CHANNEL
LEFT CHANNEL
RIGHT CHANNEL
MSB
LSB
LSB
LSB
LSB LSB
LEFT JUSTIFIED MODE––16 BITS TO 24 BITS PER CHANNEL
I
2
S MODE––16 BITS TO 24 BITS PER CHANNEL
RIGHT JUSTIFIED MODE––SELECT NUMBER OF BITS PER CHANNEL
DSP MODE––16 BITS TO 24 BITS PER CHANNEL
NOTES
1. DSP MODE DOES NOT IDENTIFY CHANNEL
2. LRCLK NORMALLY OPERATES AT f
S
EXCEPT FOR DSP MODE WHICH IS 2 × f
S
3. BCLK FREQUENCY IS NORMALLY 64 × LRCLK BUT MAY BE OPERATED IN BURST MODE
MSB
MSB
MSB
LSB
LEFT CHANNEL
MSB
LSB
MSB
RIGHT CHANNEL
LSB
MSB MSB
1/f
S
Figure 4. Stereo Serial Modes