Datasheet

AD1836A Data Sheet
Rev. A | Page 10 of 24
Pin No. In/Out Mnemonic Description
27 I ADC2INRP/CAPR2 ADC2 Right Positive Input (Direct Mode)/ADC2 Right Decoupling Capacitor
(MUX/PGA and PGA Differential Mode).
28 I AGND Analog Ground.
29 I AGND Analog Ground.
30 O OUTRN1 DAC 1 Right Negative Output.
31 O OUTRP1 DAC 1 Right Positive Output.
32 O OUTRN2 DAC 2 Right Negative Output.
33 O OUTRP2 DAC 2 Right Positive Output.
34 O OUTRN3 DAC 3 Right Negative Output.
35 O OUTRP3 DAC 3 Right Positive Output.
36
I/O
DLRCLK
LR Clock for DACs.
37 I/O DBCLK Bit Clock for DACs.
38 I DSDATA1 DAC Input 1 (Input to DAC 1 L and R).
39 I DGND Digital Ground.
40 I DVDD Digital Power Supply. Connect to digital 5 V supply.
41 I DSDATA2 DAC Input 2 (Input to DAC 2 L and R).
42 I DSDATA3 DAC Input 3 (Input to DAC 3 L and R).
43 O ABCLK Bit Clock for ADCs.
44 O ALRCLK LR Clock for ADCs.
45 I MCLK Master Clock Input.
46 I ODVDD Digital Output Driver Power Supply. Connect to 3.3 V or 5 V logic supply.
47 O ASDATA1 ADC Serial Data Output 1 (ADC 1 L and R).
48 O ASDATA2 ADC Serial Data Output 2 (ADC 2 L and R).
49 O COUT Output for Control Data.
50 I
CLATCH
Latch Input for Control Data.
51 I CCLK Control Clock Input for Control Data.
52 I DGND Digital Ground.