Datasheet

REV. A–14–
AD1835A
t
ALS
ABCLK
ALRCLK
ASDATA
LEFT-JUSTIFIED
MODE
ASDATA
RIGHT-JUSTIFIED
MODE
LSB
ASDATA
I
2
S COMPATIBLE
MODE
t
ABH
t
ABL
MSB
MSB – 1
MSB
MSB
t
ABDD
t
ALH
Figure 5. ADC Serial Mode Timing
t
DLS
DBCLK
DLRCLK
DSDATA
LEFT-JUSTIFIED
MODE
DSDATA
RIGHT-JUSTIFIED
MODE
LSB
DSDATA
I
2
S COMPATIBLE
MODE
t
DBH
t
DBL
t
DDS
MSB
MSB – 1
t
DDH
t
DDS
MSB
t
DDH
t
DDS
t
DDS
t
DDH
t
DDH
MSB
t
DLH
Figure 6. DAC Serial Mode Timing