User guide
Table Of Contents
- Cyclone V Hard IP for PCI Express User Guide
- Contents
- 1. Datasheet
- 2. Getting Started with the Cyclone V Hard IP for PCI Express
- 3. Getting Started with the Avalon-MM Cyclone Hard IP for PCI Express
- Running Qsys
- Customizing the Cyclone VHard IP for PCI Express IP Core
- Adding the Remaining Components to the Qsys System
- Completing the Connections in Qsys
- Specifying Clocks and Interrupts
- Specifying Exported Interfaces
- Specifying Address Assignments
- Simulating the Example Design
- Simulating the Single DWord Design
- Understanding Channel Placement Guidelines
- Adding Synopsis Design Constraints
- Creating a Quartus II Project
- Compiling the Design
- Programming a Device
- 4. Parameter Settings for the Cyclone V Hard IP for PCI Express
- 5. Parameter Settings for the Avalon-MM Cyclone V Hard IP for PCI Express
- 6. IP Core Architecture
- Key Interfaces
- Protocol Layers
- Multi-Function Support
- PCI Express Avalon-MM Bridge
- Avalon-MM Bridge TLPs
- Avalon-MM-to-PCI Express Write Requests
- Avalon-MM-to-PCI Express Upstream Read Requests
- PCI Express-to-Avalon-MM Read Completions
- PCI Express-to-Avalon-MM Downstream Write Requests
- PCI Express-to-Avalon-MM Downstream Read Requests
- Avalon-MM-to-PCI Express Read Completions
- PCI Express-to-Avalon-MM Address Translation for Endpoints
- Minimizing BAR Sizes and the PCIe Address Space
- Avalon-MM-to-PCI Express Address Translation Algorithm
- Single DWord Completer Endpoint
- 7. IP Core Interfaces
- Cyclone V Hard IP for PCI Express
- Avalon-MM Hard IP for PCI Express
- Physical Layer Interface Signals
- Test Signals
- 8. Register Descriptions
- Configuration Space Register Content
- Altera-Defined Vendor Specific Extended Capability (VSEC)
- PCI Express Avalon-MM Bridge Control Register Access Content
- Avalon-MM to PCI Express Interrupt Registers
- PCI Express Mailbox Registers
- Avalon-MM-to-PCI Express Address Translation Table
- Root Port TLP Data Registers
- Programming Model for Avalon-MM Root Port
- PCI Express to Avalon-MM Interrupt Status and Enable Registers for Root Ports
- PCI Express to Avalon-MM Interrupt Status and Enable Registers for Endpoints
- Avalon-MM Mailbox Registers
- Correspondence between Configuration Space Registers and the PCIe Spec 2.1
- 9. Reset and Clocks
- 10. Transaction Layer Protocol (TLP) Details
- 11. Interrupts
- Interrupts for Endpoints Using the Avalon-ST Application Interface
- Interrupts for Root Ports Using the Avalon-ST Interface to the Application Layer
- Interrupts for Endpoints Using the Avalon-MM Interface to the Application Layer
- Interrupts for End Points Using the Avalon-MM Interface with Multiple MSI/MSI-X Support
- 12. Optional Features
- 13. Flow Control
- 14. Error Handling
- 15. Transceiver PHY IP Reconfiguration
- 16. SDC Timing Constraints
- 17. Testbench and Design Example
- Endpoint Testbench
- Root Port Testbench
- Chaining DMA Design Examples
- Test Driver Module
- Root Port Design Example
- Root Port BFM
- BFM Procedures and Functions
- 18. Debugging
- A. Transaction Layer Packet (TLP) Header Formats
- Additional Information
17–38 Chapter 17: Testbench and Design Example
BFM Procedures and Functions
Cyclone V Hard IP for PCI Express December 2013 Altera Corporation
User Guide
You can suppress the display of certain message types. The default values
determining whether a message type is displayed are defined in Table 17–36. To
change the default message display, modify the display default value with a
procedure call to
ebfm_log_set_suppressed_msg_mask
.
Certain message types also stop simulation after the message is displayed.
Table 17–36 shows the default value determining whether a message type stops
simulation. You can specify whether simulation stops for particular messages with the
procedure
ebfm_log_set_stop_on_msg_mask
.
All of these log message constants type
integer
.
Table 17–36. Log Messages
Constant (Message Type) Description
Mask
Bit No
Display
by Default
Simulation
Stops by
Default
Message
Prefix
EBFM_MSG_DEBUG
Specifies debug messages. 0 No No
DEBUG:
EBFM_MSG_INFO
Specifies informational messages,
such as configuration register
values, starting and ending of
tests.
1Yes No
INFO:
EBFM_MSG_WARNING
Specifies warning messages, such
as tests being skipped due to the
specific configuration.
2Yes No
WARNING:
EBFM_MSG_ERROR_INFO
Specifies additional information for
an error. Use this message to
display preliminary information
before an error message that stops
simulation.
3Yes No
ERROR:
EBFM_MSG_ERROR_CONTINUE
Specifies a recoverable error that
allows simulation to continue. Use
this error for data miscompares.
4Yes No
ERROR:
EBFM_MSG_ERROR_FATAL
Specifies an error that stops
simulation because the error leaves
the testbench in a state where
further simulation is not possible.
N/A
Yes
Cannot
suppress
Yes
Cannot
suppress
FATAL:
EBFM_MSG_ERROR_FATAL_TB_ERR
Used for BFM test driver or Root
Port BFM fatal errors. Specifies an
error that stops simulation because
the error leaves the testbench in a
state where further simulation is
not possible. Use this error
message for errors that occur due
to a problem in the BFM test driver
module or the Root Port BFM, that
are not caused by the Endpoint
Application Layer being tested.
N/A
Y
Cannot
suppress
Y
Cannot
suppress
FATAL: