User guide

17–20 Chapter 17: Testbench and Design Example
Root Port BFM
Cyclone V Hard IP for PCI Express December 2013 Altera Corporation
User Guide
■ altpcietb_bfm_vc_intf_ast.v—a wrapper module which instantiates either
altpcietb_vc_intf_64 or altpcietb_vc_intf_<application_width> based on the type of
Avalon-ST interface that is generated.
■ altpcietb_vc_intf__<application_width>.v—provide the interface between the
Cyclone V Hard IP for PCI Express variant and the Root Port BFM tasks. They
provide the same function as the altpcietb_bfm_vc_intf.v module, transmitting
requests and handling completions. Refer to the “Root Port BFM” on page 17–20
for a full description of this function. This version uses Avalon-ST signalling with
either a 64- or 128-bit data bus interface.
■ altpcierd_tl_cfg_sample.v—accesses Configuration Space signals from the
variant. Refer to the “Chaining DMA Design Examples” on page 17–4 for a
description of this module.
Files in subdirectory <qsys_systemname>/testbench/simulation/submodules:
■ altpcietb_bfm_ep_example_chaining_pipen1b.v—the simulation model for the
chaining DMA Endpoint.
■ altpcietb_bfm_driver_rp.v–this file contains the functions to implement the
shared memory space, PCI Express reads and writes, initialize the Configuration
Space registers, log and display simulation messages, and define global constants.
Root Port BFM
The basic Root Port BFM provides a Verilog HDL task-based interface for requesting
transactions that are issued to the PCI Express link. The Root Port BFM also handles
requests received from the PCI Express link. Figure 17–4 provides an overview of the
Root Port BFM.
Figure 17–4. Root Port BFM
m
BFM Shared Memory
(altpcietb_bfm_shmem
_common)
BFM Log Interface
(altpcietb_bfm_log
_common)
Root Port RTL Model (altpcietb_bfm_rp_top_x8_pipen1b)
IP Functional Simulation
Model of the Root
Port Interface
(altpcietb_bfm_driver_rp)
Avalon-ST Interface
(altpcietb_bfm_vc_intf)
Root Port BFM
BFM Read/Write Shared Request Procedures
BFM Configuration Procedures
BFM Request Interface
(altpcietb_bfm_req_intf_common)