User guide

26 www.xilinx.com Virtex-5 FPGA Integrated Endpoint Block
UG197 (v1.5) July 22, 2009
Chapter 2: Integrated Endpoint Block Functionality
R
CRMURSTN
Input core_clk User reset (active Low). When the RESETMODE attribute is set to
FALSE, resets all the registers in the integrated Endpoint block,
except the sticky registers and the Management Interface
registers. When the RESETMODE attribute is set to TRUE, resets
the backend interface to the Transaction Layer (user_clk
domain). Asynchronous, but the integrated Endpoint block
ensures internal synchronous deassertion with respect to
core_clk. Should be tied High if not used in the user design or if
the block is not used.
CRMNVRSTN
Input core_clk Non-volatile reset (active Low). When the RESETMODE attribute
is set to FALSE, resets the sticky registers, and everything else in
the block except for the Management Interface registers. When
the
RESETMODE attribute is set to TRUE, resets the sticky
registers only. Asynchronous, but the integrated Endpoint block
ensures internal synchronous deassertion with respect to
core_clk. Should be tied High if not used in the user design or if
the block is not used.
CRMMGMTRSTN
Input core_clk Management interface reset (active Low). Resets the registers in
the block, including the management interface registers. The
function of this signal does not depend on the
RESETMODE
attribute setting. Asynchronous, but the integrated Endpoint
block ensures internal synchronous deassertion with respect to
core_clk. Should be tied High if not used in the user design or if
the block is not used.
CRMUSERCFGRSTN
Input core_clk User configuration reset (active Low). Resets all the registers in
the PCI Express Configuration Space except the sticky registers.
The function of this signal does not depend on the
RESETMODE
attribute setting. Asynchronous, but the integrated Endpoint
block ensures internal synchronous deassertion with respect to
core_clk. Should be tied High if not used in the user design or if
the block is not used.
CRMMACRSTN
Input core_clk MAC reset (active Low). When the RESETMODE attribute is set
to FALSE, CRMMACRSTN is not used and should be tied High.
When the
RESETMODE attribute is set to TRUE, CRMMACRSTN
resets the MAC link and MAC lane logic (Physical Layer).
Asynchronous, but the integrated Endpoint block ensures
internal synchronous deassertion with respect to core_clk.
Should be tied High if not used in the user design or if the block
is not used.
CRMLINKRSTN
Input core_clk Link reset (active Low). When the RESETMODE attribute is set to
FALSE,
CRMLINKRSTN is not used and should be tied High.
When the
RESETMODE attribute is set to TRUE, CRMLINKRSTN
resets the core_clk domain of the Transaction Layer, part of the
Configuration module, and the Data Link Layer. Asynchronous,
but the integrated Endpoint block ensures internal synchronous
deassertion with respect to core_clk. Should be tied High if not
used in the user design or if the block is not used.
Table 2-3: Clock and Reset Ports (Continued)
Port Direction
Clock
Domain
Description