User guide

Virtex-5 FPGA Integrated Endpoint Block www.xilinx.com 11
UG197 (v1.5) July 22, 2009
Additional Support Resources
R
• Virtex-5 FPGA System Monitor User Guide
The System Monitor functionality available in all the Virtex-5 devices is outlined in
this guide.
• Virtex-5 FPGA Packaging and Pinout Specifications
This specification includes the tables for device/package combinations and maximum
I/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, and
thermal specifications.
• Virtex-5 FPGA PCB Designer’s Guide
This guide provides information on PCB design for Virtex-5 devices, with a focus on
strategies for making design decisions at the PCB and interface level.
Additional Support Resources
To search the database of silicon and software questions and answers or to create a
technical support case in WebCase, see the Xilinx website at:
http://www.xilinx.com/support
.
Typographical Conventions
This document uses the following typographical conventions. An example illustrates each
convention.
Online Document
The following conventions are used in this document:
Convention Meaning or Use Example
Italic font
References to other documents
See the Virtex-5 FPGA Configuration
Guide for more information.
Emphasis in text
The address (F) is asserted after
clock event 2.
Underlined Text
Indicates a link to a web page. http://www.xilinx.com/virtex5
Convention Meaning or Use Example
Blue text
Cross-reference link to a location
in the current document
See the section “Additional
Support Resources” for details.
Refer to “The PCI Express
Standard” in Chapter 1 for
details.
Red text
Cross-reference link to a location
in another document
See Figure 2-5 in the Virtex-5
FPGA Data Sheet.
Blue, underlined text
Hyperlink to a website (URL)
Go to http://www.xilinx.com
for the latest documentation.