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DESIGN XPRESS V 1.5 - PROGRAMMER GUIDE
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www
.xilinx.com
Vir
tex-5 FPGA I
ntegrated Endpoint Bloc
k
UG197 (v1.5) July 22, 2009
Appendix A:
Integrated Endpoint Blo
ck Attrib
utes
R
1
...
...
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