Unit installation

Glossary
Altera Corporation 331
Glossary
Glossary
Example: group a[2..0] consists of the
nodes a2, a1, and a0; the MSB is a2; and
the LSB is a0.
Raw Binary File (.rbf) A binary file (with
the extension .rbf) containing
configuration data for FLEX 6000,
FLEX 8000, and FLEX 10K devices. This file
is the binary equivalent of a Tabular Text
File (.ttf).
You can create RBFs that support Passive
Parallel Synchronous (PPS), Passive
Parallel Asynchronous (PPA), and Passive
Serial (PS) configuration schemes in
MAX+PLUS II.
register see flipflop.
register packing A feature of logic cells in
MAX 9000 and FLEX 10K devices that
allows two logic functionsÑa
combinatorial logic function and a register
with a single data inputÑto be
implemented in the same logic cell.
You can manually implement register
packing by assigning two logic functions to
the same logic cell. In addition, the Global
Project Logic Synthesis command (Assign
menu) includes an Automatic Register
Packing option to allow the Compiler to
automatically implement register packing
for appropriate pairs of logic functions.
Altera strongly recommends using the
Automatic Register Packing option rather
than manual logic cell assignments to
implement register packing.
This option is available in both multi-level
and standard synthesis. It is ignored if it
does not apply to the current device family.
registered feedback Feedback that is the
output of a flipflop or latch.
registered output The output of a flipflop
or latch, which can feed an output pin on
the device.
registered performance The minimum
required Clock period and the maximum
Clock frequency for a circuit, which can be
calculated in the MAX+PLUS II Timing
Analyzer.
The Clock period equals the maximum
delay from the Q output of a flipflop to the
D or Clock Enable input of a flipflop, plus
the internal setup time and propagation
delay through the flipflop. Clock skew
calculations may increase the Clock period.
The Clock frequency equals (1/Clock
period).
1 The Timing Analyzer does not
calculate registered performance for
a signal path that passes through the
primary (data) input to a flipflop.
Report File (.rpt) An ASCII text file (with
the extension .rpt), generated by the
CompilerÕs Fitter module, that shows how
device resources are used by the project. If
a module preceding the Partitioner
generates an error, this file is not
generated. If the Partitioner generates an
error, the Report File is generated in most
cases.
Reset An active-high input signal that
asynchronously resets the output of a
register to a logic low (0) or a state machine
to its initial state, regardless of other
inputs.
resource A resource is a portion of an
Altera device that performs a specific, user-
defined task (e.g., pins, logic cells).
81_GSBOOK.fm5 Page 331 Tuesday, October 14, 1997 4:04 PM