Unit installation

Glossary
Altera Corporation 327
Glossary
Glossary
such as the functions in the Library of
Parameterized Modules (LPM), are
inherently parameterized and require
parameter values to be assigned.
Parameters can be assigned to any
individual instance of a megafunction in
MAX+PLUS II to control its size or
implementation. Some parameters can also
be applied to old-style macrofunctions to
determine their style of implementation.
MAX+PLUS II also allows you to assign
global, project-wide default values for
parameters.
parameterized module A logic function
that uses parameters to achieve scalability,
adaptability, and efficient silicon
implementation. MAX+PLUS II supports a
variety of parameterized modules (also
called Òparameterized functionsÓ),
including functions belonging to the
Library of Parameterized Modules (LPM).
LPM functions provide architecture-
independent design entry for all
MAX+PLUS II-supported devices. The
MAX+PLUS II Compiler includes built-in
compilation support for LPM functions
used in schematic, AHDL, VHDL, Verilog
HDL, and EDIF input files.
pin A pin is an actual input or I/O pin on
an Altera device.
In Graphic Editor files, a pin is represented
by an INPUT, INPUTC, OUTPUT, OUTPUTC,
BIDIR, or BIDIRC symbol. In a Text
Design File (.tdf), a pin is represented as an
INPUT, OUTPUT, or BIDIR port. In a VHDL
Design File (.vhd), a pin is represented as
an IN, OUT, or INOUT port. In a Verilog
Design File (.v), a pin is represented as an
input, output, or inout port. In a
Waveform Design File (.wdf), a pin is
represented as a node with an input,
output, or bidirectional I/O type and a pin
input, registered, or combinatorial node
type.
You can assign a logic function to a specific
pin number. You can also assign a logic
function to a row or a column to ensure that
the function is implemented in a pin on a
particular row or column.
pin number A number used to assign an
input or output signal in a design file,
which corresponds to the pin number on
an actual device.
Both letters and digits are used to specify
pin numbers for PGA-package devices.
pinstub In the Graphic and Symbol
Editors, a pinstub is the location on the
boundary of a symbol represented by an
ÒxÓ in a Symbol File (.sym) and a name that
represents an input or output of the
primitive or of the megafunction or
macrofunction design file that the symbol
represents. A line (node) drawn in a
schematic must connect to this pinstub to
be recognized by the Compiler as a
connection between the logic in the current
file and the logic in the primitive,
megafunction, or macrofunction.
You can specify whether or not to use an
optional pinstub when you edit a symbol
instance in a Graphic Editor file.
Pinstubs in Graphic Editor files are
synonymous with ports in AHDL Function
Prototypes and VHDL Component
Declarations. They are also synonymous
with ports listed in the Subdesign Sections
of lower-level Text Design Files (.tdf); in
Entity Declarations of lower-level VHDL
Design Files (.vhd); and in Module
81_GSBOOK.fm5 Page 327 Tuesday, October 14, 1997 4:04 PM