AS5030 8-Bit Programmable High Speed Magnetic Rotary Encoder 1 General Description 2 Key Features 360° contactless angular position encoding The AS5030 is a contactless magnetic rotary encoder for accurate angular measurement over a full turn of 360°. It is a system-on-chip, combining integrated Hall elements, analog front end and digital signal processing in a single device.
AS5030 Datasheet - C o n t e n t s Contents 1 General Description .................................................................................................................................................................. 1 2 Key Features............................................................................................................................................................................. 1 3 Applications........................................................................
AS5030 Datasheet - C o n t e n t s 8.5 AS5030 Status Indicators ................................................................................................................................................................... 8.5.1 8.5.2 8.5.3 8.5.4 C2 Status Bit.............................................................................................................................................................................. Lock Status Bit.......................................................
AS5030 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments (Top View) 1 16 PWM PROG 2 15 C2 14 C1 A S5030 MagRngn VSS 3 test3 4 test2 5 test1 6 test0 7 10 TC 8 9 13 VDD 12 DIO 11 CS CLK DX 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name Pin Type 1 MagRngn Digital output / tri-state 2 PROG 3 VSS 4 T3_SINn - This pin is used for factory testing. For normal operation it must be left unconnected.
AS5030 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 6 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2.
AS5030 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics TAMB = -40°C to +125°C, VDD5V = 4.5V ~ 5.5V, all voltages referenced to VSS, unless otherwise noted. 6.1 Operating Conditions Symbol Parameter VDD Positive supply voltage IDD Operating current Ioff Power-down current TAMB Ambient temperature Conditions Min Typ 4.5 Max Units 5.5 V No load on outputs. Minimum AGC (strong magnetic field) 14 18 No load on outputs.
AS5030 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.3 Magnet Specifications Recommended magnet: NdFeB 35H BR = 12.000 Gauss, Ø6mm x 2.5mm Symbol Parameter Conditions MD Magnet diameter Diametrically magnetized MT Magnet thickness Bi Magnetic input range At chip surface, on a radius of 1mm vi Magnet rotation speed To maintain locked state Bmax Magnetic field high detection TAMB=25°C, AGC @ lower limit, 1 sigma = 2.
AS5030 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.6 Programming Parameters Symbol Parameter Conditions Min VPROG Programming voltage Static voltage at pin PROG 8.0 IPROG Programming current TambPROG Programming ambient temperature During programming tPROG Programming time Timing is internally generated Analog readback voltage During Analog Readback mode at pin PROG VR,prog VR,unprog Typ Max Units 8.5 V 100 mA 0 85 °C 2 4 µs 0.5 2.2 3.5 V 6.
AS5030 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.8 8-bit PWM Output Symbol Parameter NPWM PWM resolution Conditions PWMIN PWM pulse width Angle = 0° (00H) PWMAX PWM pulse width Angle = 358.6° (FFH) PWP PWM period fPWM PWM frequency Hyst Min 1 Over full temperature range 2 Digital hysteresis Typ Max Units 8 bit 2 µs/step 1.66 2.26 2.85 µs 427 578 731 µs 428 581 734 µs 1 / PWM period 1.72 kHz At change of rotation direction 1 bit 1.
AS5030 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7 Detailed Description The benefits of AS5030 are as follows: Complete system-on-chip, no calibration required Flexible system solution provides absolute serial and PWM output Ideal for applications in harsh environments due to magnetic sensing principle High reliability due to non-contact sensing Robust system, tolerant to horizontal misalignment, airgap variations, temperature variations and external magnetic fields Figure 3.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 4. SSI Read/Write Serial Data Transmission +5 V VDD 13 VDD VDD 11 Output Micro 10 Output Controller CS CLK 12 I/O AS5030 100 n DI O VSS C1 14 C2 VSS 15 3 VSS Figure 5. Timing Diagram in 3-wire SSI R/W Mode command phase data phase t CLK CLK 1 2 3 4 5 6 20 7 21 t1 t9 CS t5 DIO CMD 3 CMD4 t3 DIO t4 CMD 0 t6 t7 DIO read t8 D 15 t 10 D1 D 14 DIO write D0 Table 3.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7.3 Serial 3-Wire Read-only Connection If the AS5030 is only used to provide the angular data (no power down or OTP access) this simplified connection is possible. The Chip Select (CS) and Clock (CLK) connection is the same as in the R/W mode, but only a digital input pin (not an I/O pin) is required for the DIO connection.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7.4 Serial 2-Wire Connection (R/W Mode) By connecting the configuration input C2 to VDD, the AS5030 is configured to 2-wire data transmission mode. Only Clock (CLK) and Data (DIO) signals are required. A Chip Select (CS) signal is automatically generated by the DX output, when a time-out of CLK occurs (typ. 20µs). Note: Read-only mode is also possible in this configuration. Figure 8.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7.5 Serial 2-Wire Continuous Readout nd The termination of each readout sequence by a timeout of CLK after the 22 clock pulse as described in Serial 2-Wire Connection (R/W Mode) is the safest method to ensure synchronization, as each timeout of CLK resets the serial interface. However, it is not mandatory to apply a timeout of CLK and consequently synchronization after each reading.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 12. Timing Diagram in 2-wire Read only Mode (differential transmission) CLK 1 2 3 4 5 6 7 8 20 21 timeout tTO DI D 15 D 14 D1 D0 Table 5. SSI Read-only Serial Bit Sequence (21bit read) Read D20 D19 D18 D17 D16 D15 D14 D13 D12 0 0 0 0 0 C2 lock D11 D10 D9 D8 D7 D6 D5 AGC D5 D4 D3 D2 D4 D3 D2 D1 D0 D2 D1 D0 Angle D1 D0 D7 D6 D5 D4 D3 7.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n The minimum PWM pulse width tON (PWM = high) is 1 LSB @ 0° (Angle reading = 00H). 1LSB = nom. 2.26µs. The PWM pulse width increases with 1LSB per step. At the maximum angle 358.6° (Angle reading = FFH), the pulse width tON (PWM = high) is 256 LSB and the pause width tOFF (PWM = low) is 1 LSB. This leads to a total period (tON + tOFF) of 257LSB. PWM out 2. 26 µs 5V 0V 291. 54 µs 578 . 56 µs 578. 56 µs ton 2. 26 µs toff 287.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7.8 Analog Output This configuration is similar to the PWM connection (only three lines including supply are required). With the addition of a low-pass filter at the PWM output, this configuration produces an analog voltage that is proportional to the angle. This filter can be either passive (as shown) or active. The lower the bandwidth of the filter, the less ripple of the analog output can be achieved.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7.9 Analog Sin/Cos Outputs with External Interpolator By connecting C1 to VDD, the AS5030 provides analog Sine and Cosine outputs (Sin, Cos) of the Hall array front-end for test purposes. These outputs allow the user to perform the angle calculation by an external ADC + µC, e.g. to compute the angle with a high resolution.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7.10 3-Wire Daisy Chain Mode The Daisy Chain mode allows connection of more than one AS5030 to the same controller interface. Independent of the number of connected devices, the interface to the controller remains the same with only three signals: CSn, CLK and DO. In Daisy Chain mode, the data from the second and subsequent devices is appended to the data of the first device.
AS5030 Datasheet - D e t a i l e d D e s c r i p t i o n 7.11 2-Wire Daisy Chain Mode The AS5030 can also be connected in 2-wire Daisy Chain mode, requiring only two signals (Clock and Data) for any given number of daisychained devices. Note that the connection of all devices except the last device is the same as for the 3-wire connection (see Figure 17). The last device must have pin C2 (#15) set to ‘high’ and feeds the DX signal to CS of the first device.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8 Application Information AS5030 Parameter and Features List. Parameter Description Supply voltage 5V ± 10% Supply current Low Power Mode, non-operational: typ. 1.4mA Ultra-low Power Mode, non-operational: typ. 30µA Normal operating mode: typ. 14mA. Absolute output; Serial Interface SSI clock rate 21-bit Synchronous Serial Interface (SSI): 5 command bits, 2 data valid bits, 6 data bits for magnetic field strength, 8 data bits for angle.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1 AS5030 Programming The AS5030 has an integrated 18-Bit OTP ROM for configuration purposes. 8.1.1 OTP Programming Options The OTP programming options can be set permanently by programming or temporarily by overwriting. Both methods are carried out over the serial interface, but with different commands (WRITE OTP, PROG OTP). Note: During the 18bit OTP programming, each bit needs 4 clock pulses to be validated.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2.2 16-bit Write Command These settings are temporary; they cannot be programmed permanently. The settings will be lost when the power supply is removed.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2.4 18-bit OTP Write Commands During the 18bit OTP read/write transfer, each bit needs 4 clock pulses to be validated.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.3 OTP Programming Connection Programming of the AS5030 OTP memory does not require a dedicated programming hardware. The programming can be simply accomplished over the serial 3-wire interface (see Figure 22) or the optional 2-wire interface (see Figure 8). For permanent programming (command PROG OTP, #19H), a constant DC voltage of 8.0V ~ 8.5V (≥100mA) must be connected to pin #2 (PROG).
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.4 Programming Verification After programming, the programmed OTP bits may be verified in two ways: - By digital verification: this is simply done by sending a READ OTP command (#0FH). The structure of this register is the same as for the OTP PROG or OTP WRITE commands.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.5.3 Magnetic Field Strength Indicators The AS5030 is not only able to sense the angle of a rotating magnet, it can also measure the magnetic field strength (and hence the vertical distance) of the magnet. This extra feature can be used for several purposes: - as a safety feature by constantly monitoring the presence and proper vertical distance of the magnet - as a state-of-health indicator, e.g.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 24. Magnetic Field Strength Indicator +5 V VDD 1k 13 LED 1 VDD VDD 1 11 Output Micro Controller 10 Output 12 I/O MagRngn CS AS5030 CLK 100n DI O C1 VSS 14 C2 15 VSS 3 VSS 8.6 High Speed Operation The AS5030 is using a fast tracking ADC (TADC) to determine the angle of the magnet. The TADC has a tracking rate of 1.15µs (typ). Once the TADC is synchronized with the angle, it sets the LOCK bit in the status register.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Chip Internal Low-pass Filtering. A commonplace practice for systems using analog-to-digital converters is to filter the input signal by an anti-aliasing filter. The filter characteristic must be chosen carefully to balance propagation delay and noise. The low-pass filter in the AS5030 has a cut-off frequency of typ. 23.8kHz and the overall propagation delay in the analog signal path is typ. 15.6µs. Digital Readout Rate.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.7.1 Low Power Mode and Ultra-low Power Mode Figure 25.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Hys = 1. (No hysteresis) 1. Wait for CPU interrupt or delay for next angle read (typ. <3ms in LP mode, typ>3ms in ULP mode) 2. Wake up (PSM = 0) 3. Wait 0.01ms (Low Power Mode) 4. Check if Lock = 1 then read angle 5. Enable Low Power Mode or Ultra-low Power Mode (PSM=1) 6. Return to 1 The difference between Low Power Mode and Ultra-low Power Mode is the current consumption and the wake-up time to switch back to active operation.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.7.2 Power Cycling Mode The power cycling method shown in Figure 26 cycles the AS5030 by switching it on and off, using an external PNP transistor high side switch. This mode provides the least power consumption of all three modes; when the sampling interval is more than 400ms, as the current consumption in off-mode is zero.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.8 Accuracy of the Encoder System This chapter describes which individual factors influence the accuracy of the encoder system and how to improve them. Accuracy is defined as the difference between measured angle and actual angle. This is not to be confused with resolution, which is the smallest step that the system can resolve. The two parameters are not necessarily linked together.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 29 shows a typical example of an error curve over a full turn of 360° at a given X-Y displacement. The curve includes the quantization error, transition noise and the system error. The total error is ~2.2° peak/peak (± 1.1°). The sawtooth-like quantization error (see also Figure 28) can be reduced by averaging, provided that the magnet is in constant motion and there are an adequate number of samples available.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Sensitivity Trimming. As the curves for the 4 samples in Figure 30 show, the AGC value will not show exactly the same value at a given airgap on each part. For example, at 1mm vertical distance, the AGC may read a value between ~11 ~ 24. This is because for normal operation an exact trimming is not required since the AGC is part of a closed loop system.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.9.1 Magnet Placement Ideally, the center of the magnet, the diagonal center of the IC and the rotation axis of the magnet should be in one vertical line. The lateral displacement of the magnet should be within the placement of the chip within the IC package. ± 0.25mm from the IC package center or ± 0.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 33. Vertical Magnetic Field Distribution of a Cylindrical 6mm Ø Diametric Magnetized Magnet at 1mm Gap BZ; 6m m m agnet @ Z=1mm area of X-Y-misalignment from center: +/- 0.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 34. Typical Error Curve of INL Error Over Lateral Displacement (including quantization error) INL vs.
AS5030 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.10 Physical Placement of the Magnet The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the chip as shown in the drawing below: Figure 35. Defined Chip Center and Magnet Displacement Radius 3.2mm 3.2mm 1 2.3975+/-0.055mm Defined center Rd 2.3975+/-0.055mm Area of recommended maximum magnet misalignment Magnet Placement.
AS5030 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 9 Package Drawings and Markings The device is available in a 16-pin TSSOP package. Figure 37. 16-pin TSSOP Package YYWWMZZ AS5030 Symbol A A1 A2 b c D E E1 e L L1 Min 0.05 0.80 0.19 0.09 4.90 4.30 0.45 - Nom 1.00 5.00 6.40 BSC 4.40 0.65 BSC 0.60 1.00 REF Max 1.20 0.15 1.05 0.30 0.20 5.10 4.50 0.75 - Symbol R R1 S Θ1 Θ2 Θ3 aaa bbb ccc ddd N Min 0.09 0.09 0.20 0º - Nom - 12 REF 12 REF 0.10 0.10 0.05 0.20 16 Max 8º - Notes: 1.
AS5030 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s JEDEC Package Outline Standard: MO - 153 AB Thermal Resistance Rth(j-a): 89 K/W in still air, soldered on PCB 9.1 Recommended PCB Footprint Figure 38. PCB Footprint Recommended Footprint Data Symbol mm inch A 7.26 0.286 B 4.93 0.194 C 0.36 0.014 D 0.65 0.0256 E 4.91 0.193 www.ams.com/AS5030 Revision 2.
AS5030 Datasheet - O r d e r i n g I n f o r m a t i o n 10 Ordering Information The devices are available as the standard products shown in Table 7. Table 7. Ordering Information Ordering Code Description Delivery Form Package AS5030-ATSU 1 box = 100 tubes á 96 devices Tubes 16-pin TSSOP AS5030-ATST 1 reel = 4500 devices Tape & Reel 16-pin TSSOP Note: All products are RoHS compliant and ams green. Buy our products or get free samples online at www.ams.
AS5030 Datasheet - C o p y r i g h t s Copyrights Copyright © 1997-2013, ams AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies.
