Specifications

Chapter 3 Hardware
LittleBoard 800 Reference Manual 55
LVDS Interface (J26)
Table 3-24 describes the pin-outs and signals of the LVDS interface and it has 30 pins, 2 rows, odd/even,
(1, 2) with 2mm pin spacing header.
Table 3-24. LVDS Interface Pin/Signal Descriptions (J26)
Pin # Signal Description Line Channel
1 +12V +12 volt input
2 +VCC (+3.3V/+5V) JP1 determines voltage on pin
3 GND Ground
4 GND Ground
NA NA
5 CLK_LVDS_IYBP Clock Positive Output
6 CLK_LVDS_IYBM Clock Negative Output
Clock
7 LVDS_IYBP3 Data Positive Output
8 LVDS_IYBM3 Data Negative Output
3
9 LVDS_IYBP2 Data Positive Output
10 LVDS_IYBM2 Data Negative Output
2
11 LVDS_IYBP1 Data Positive Output
12 LVDS_IYBM1 Data Negative Output
1
13 LVDS_IYBP0 Data Positive Output
14 LVDS_IYBM0 Data Negative Output
0
Channel 2
15 LVDS_PANELBKLTCTL Control Panel Backlight NA NA
16 LVDS_PANELVDDEN Enable Panel Power NA NA
17 CLK_LVDS_IYAP Clock Positive Output
18 CLK_LVDS_IYAM Clock Negative Output
Clock
19 LVDS_IYAP3 Data Positive Output
20 LVDS_IYAM3 Data Negative Output
3
Channel 1
21 LVDS_IYAP2 Data Positive Output
22 LVDS_IYAM2 Data Negative Output
2
23 LVDS_IYAP1 Data Positive Output
24 LVDS_IYAM1 Data Negative Output
1
25 LVDS_IYAP0 Data Positive Output
26 LVDS_IYAM0 Data Negative Output
0
27 DDCPCLK Display Data Channel Clock NA NA
28 DDCPDATA Display Data Channel Data NA NA
29 LVDS_PANELBKLTEN Enable Backlight Inverter NA NA
30 NC Not Connected NA NA
Note: The shaded area denotes power or ground.
NOTE Pins 5-14 constitute 2
nd
channel interface of two channels. Pins
15-26 constitute 1
st
channel interface of two channels, or a single
channel interface.