Specifications

Chapter 3 Hardware
26 Reference Manual LittleBoard 800
Pin # Signal Input/
Output
Description
25 (A25) GNT1* T/S
Grant 1 – These signal (GNT 0-2) lines indicate access has been
granted to the requesting device (PCI Masters).
26 (A26) +5V +5 volts ±5% power supply input
27 (A27) CLK2 In
Clock 2 – These clocks (CLK 0-3) provide timing outputs for four
external PCI devices and all timing transactions on the PCI bus.
28 (A28) GND Ground
29 (A29) +12V +12 volts ±5% power supply input
30 (A30) -12V -12 volts (Supplied externally or through PC/104-Plus bus)
31 (B1) NC Not connected (Reset)
32 (B2) AD02 T/S Address/Data Bus Line 2 – Refer to pin A3 for more information.
33 (B3) GND Ground
34 (B4) AD07 T/S Address/Data Bus Line 7 – Refer to pin A3 for more information.
35 (B5) AD09 T/S Address/Data Bus Line 9 – Refer to pin A3 for more information.
36 (B6) VI/O +5 volts ±5% (Reference voltage only)
37 (B7) AD13 T/S Address/Data Bus Line 13 – Refer to pin-A3 for more information.
38 (B8) C/BE1* T/S Command/Byte Enable 1 – Refer to pin-A4 for more information.
39 (B9) GND Ground
40 (B10) PERR* Parity Error – This signal is for reporting data parity errors.
41 (B11) +3.3V +3.3 volts ±5% power supply input
42 (B12) TRDY* S/T/S Target Ready – This signal indicates the selected device’s ability to
complete the current cycle of transaction. Both IRDY* and TRDY*
must be asserted to terminate a data cycle.
43 (B13) GND Ground
44 (B14) AD16 T/S Address/Data Bus Line 16 – Refer to pin-A3 for more information.
45 (B15) +3.3V +3.3 volts ±5% power supply input
46 (B16) AD20 T/S Address/Data Bus Line 20 – Refer to pin-A3 for more information.
47 (B17) AD23 T/S Address/Data Bus Line 23 – Refer to pin-A3 for more information.
48 (B18) GND Ground
49 (B19) C/BE3* T/S Command/Byte Enable 3 – Refer to pin-A4 for more information.
50 (B20) AD26 T/S Address/Data Bus Line 26 – Refer to pin-A3 for more information.
51 (B21) +5V +5 volts ±5% power supply input
52 (B22) AD30 T/S Address/Data Bus Line 30 – Refer to pin-A3 for more information.
53 (B23) GND Ground
54 (B24) REQ2* T/S Bus Request 2 – Refer to pin-A23 for more information.
55 (B25) VI/O +5 volts ±5% (Reference voltage only)
56 (B26) CLK0 In Clock 0 – Refer to pin-A27 for more information
57 (B27) +5V +5 volts ±5% power supply input
58 (B28) INTD* O/D Interrupt D – This signal is used to request interrupts only for multi-
function devices.
59 (B29) INTA* O/D Interrupt A – This signal is used to request an interrupt.