Specifications

Chapter 3 Hardware
48 Reference Manual ReadyBoard 800
LVDS Interface (J14)
Table 3-17. LVDS Interface Pin/Signal Descriptions (J14)
Pin # Signal Description Line Channel
1 +12V +12V source
2 VCC_LCD +3.3V or +5V
Depends on JP4 setting
(+3.3V Default)
3 GND Ground
4 GND Ground
Gnd
5 LVDSB_Clk+ Clock Positive Output
6 LVDSB_Clk- Clock Negative Output
Clk
7 LVDSB_Y3+ Data Positive Output
8 LVDSB_Y3- Data Negative Output
3
9 LVDSB_Y2+ Data Positive Output
10 LVDSB_Y2- Data Negative Output
2
11 LVDSB_Y1+ Data Positive Output
12 LVDSB_Y1- Data Negative Output
1
13 LVDSB_Y0+ Data Positive Output
14 LVDSB_Y0- Data Negative Output
0
Channel 2
15 LVD_BKLTCtl Backlight Control
16 LVD_EN LCD enable
17 LVDSA_Clk+ Data Positive Output
18 LVDSA_Clk Data Negative Output
Clk
19 LVDSA_Y3+ Data Positive Output
20 LVDSA_Y3 Data Negative Output
3
21 LVDSA_Y2+ Data Positive Output
22 LVDSA_Y2 Data Negative Output
2
23 LVDSA_Y1+ Data Positive Output
24 LVDSA_Y1- Data Negative Output
1
25 LVDSA_Y0+ Data Positive Output
26 LVDSA_Y0- Data Negative Output
0
Channel 1
27 LVDS_DDCPClk Clock
28 LVDS_DDCPData Data
29 LCD_BKLEN Backlight Enable
30 NC Not connected
NOTE Pins 17-26
constitute 1st
channel interface
of two channels,
or a single
channel interface.
Pins 5-14
constitute 2nd
channel interface
of two channels.
Note: The shaded area denotes power or ground.