Specifications

Chapter 3 Hardware
ReadyBoard 800 Reference Manual 31
Pin # Signal Description
23 PDIOW* Primary Device I/O Write Strobe – Strobe signal for write functions. Negative
edge enables data from a register or data port of the drive onto the host data bus.
Positive edge latches data at the host.
24 GND Ground
25 PDIOR*
Primary I/O Read Strobe – Strobe signal for read functions. Negative edge
enables data from a register or data port of the drive onto the host data bus.
Positive edge latches data at the host.
26 GND Ground
27 PIORDY Primary I/O Channel Ready – When negated extends the host transfer cycle of
any host register access when the drive is not ready to respond to a data transfer
request. High impedance if asserted.
28 PCSEL Primary Cable Select – Tied to ground through 470 ohm resistor.
29 PDDACK*
Primary DMA Channel Acknowledge – Used by the host to acknowledge data
has been accepted or data is available. Used in response to DMARQ assertion.
30 GND Ground
31 IRQ14
Interrupt Request 14 – Asserted (IRQ14) by drive when it has pending interrupt
(PIO transfer of data to or from the drive to the host).
32 NC Not connected
33 PDA1
Primary IDE ATA Disk Address 1– Used (0 to 2) to indicate which byte in the
ATA command block or control block is being accessed.
34 PD33/66 UDMA 33/66 Sense – Senses which DMA mode to use for IDE devices.
35 PDA0 Primary IDE ATA Disk Address 0 – See pin-33 (PDA1) for more information.
36 PDA2 Primary IDE ATA Disk Address 2 – See pin-33 (PDA1) for more information.
37 PDCS1* Primary Chip Select 1 – Used to select the host-accessible Command Block
Register.
38 PDCS3* Primary Chip Select 3 – Used to select the host-accessible Command Block
Register.
39 IDEACT* IDE Activity – Indicates EIDE activity to yellow IDE LED (D5) on card edge.
40 GND Ground
41 +5V +5 volts +/-5%
42 +5V +5 volts +/-5%
43 GND Ground
44 NC Not connected
Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.