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ReadyBoard

™

800

Single Board Computer

Reference Manual

P/N 5001804A Revision D

Summary of content (104 pages)

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ReadyBoard™ 800 Single Board Computer Reference Manual P/N 5001804A Revision D
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Notice Page NOTICE No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Ampro Computers, Incorporated.
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Contents Contents ............................................................................................................................................... iii Chapter 1 About This Manual ............................................................................................................. 1 Purpose of this Manual ...................................................................................................................... 1 Reference Material ...........................................
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Contents 10/100BaseT Ethernet Controller.................................................................................................51 Audio Interface (J4) ..........................................................................................................................52 Video Interfaces (J14, J21)...............................................................................................................53 CRT Interface (J21) ................................................................
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Contents List of Figures Figure 2-1. Typical ReadyBoard and PC/104 Module Stack ............................................................ 8 Figure 2-2. Stacking PC/104 Modules with a ReadyBoard 800...................................................... 10 Figure 2-3. Functional Block Diagram............................................................................................. 14 Figure 2-4. Component Location (Top view)...............................................................................
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Contents Table 3-13. Ethernet Port 2 Pin/Signal Descriptions (J17)..............................................................50 Table 3-14. Ethernet Port 1 Pin/Signal Descriptions (J16)..............................................................51 Table 3-15. Audio Interface Pin/Signal Descriptions (J4)................................................................52 Table 3-16. CRT Interface Pin/Signal Descriptions (J21)................................................................54 Table 3-17.
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Chapter 1 About This Manual Purpose of this Manual This manual is for designers of systems based on the ReadyBoard™ 800 single board computer (SBC). This manual contains information that permits designers to create an embedded system based on specific design requirements.
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Chapter 1 About This Manual Major Integrated Circuit (IC or Chip) specifications used on the ReadyBoard 800: • Intel® Corporation and the Pentium® M 745, Pentium M 738, Celeron® M 373, or Celeron M processors Web site: http://www.intel.com/design/mobile/datashts/302189.htm Web site: http://www.intel.com/design/mobile/datashts/303110.htm Web site: http://www.intel.
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Chapter 1 About This Manual • ReadyBox™ Family The ReadyBox family includes a series of enclosures with varying sizes that accept all of Ampro's ReadyBoard products. These ReadyBox enclosures allow you to install your ReadyBoard product with your preferred set of options for a rapidly deployable system for OEM production volumes.
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Chapter 1 About This Manual Other Ampro Products • CoreModule™ Family – These complete embedded-PC subsystems on single PC/104 or PC/104Plus form-factor (3.6"x3.8") modules feature 486, Celeron, and Celeron M CPUs. Each CoreModule includes a full complement of PC core logic functions, plus disk controllers, and serial and parallel ports. Most modules also include CRT and flat panel graphics controllers and/or an Ethernet interface.
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Chapter 2 Product Overview This introduction presents general information about the EPIC Architecture and the ReadyBoard 800 single board computer (SBC). After reading this chapter you should understand: • EPIC Architecture • ReadyBoard 800 architecture • ReadyBoard 800 features • Major components • Connectors • Specifications EPIC Architecture In 2004, five companies collaborated to fill the void between the EBX size and the PC/104 size with a new industry standard form factor (115 mm x 165 mm, or 4.
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Chapter 2 Product Overview Product Description The ReadyBoard 800 is a mid-sized, EPIC-compatible, affordable, high quality single-board system, which contains all the component subsystems of a PC/AT PCI motherboard plus the equivalent of several PCI expansion boards. The ReadyBoard 800 is based on one of the ultra high performance, high-integration Intel Pentium M or Celeron M processors.
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Chapter 2 Product Overview Board Features • CPU features ♦ Provides 1.8 GHz Intel Pentium M, 1.4 GHz Low Voltage (LV) Pentium M, 1.0 GHz Ultra Low Voltage (ULV) Celeron M, or 800 MHz Ultra Low Voltage (ULV) Celeron M processors ♦ All processors support a Front Side Bus (FSB) of 400 MHz • Memory ♦ Provides a single standard 200-pin DDR SODIMM socket ♦ Supports a single +2.
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Chapter 2 Product Overview ♦ Provides 16550-equivalent controllers, each with a built-in 16-byte FIFO buffer ♦ Supports full modem capability on three of the four ports ♦ Supports RS-232 operation on all four ports ♦ Supports RS-485 or RS-422 operation on two ports, Serial 3 & 4 (COM3 & COM4) ♦ Supports programmable word length, stop bits, and parity ♦ Supports 16-bit programmable baud-rate generator • USB Ports ♦ Provides two root USB hubs ♦ Provides four USB ports ♦ Provides two standard
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Chapter 2 Product Overview • Keyboard/Mouse Interface ♦ Provides PS/2 keyboard (shared with mouse) interface ♦ Provides PS/2 mouse (shared with keyboard) interface ♦ Provides shared over-current fuse • Miscellaneous ♦ Provides real-time clock (RTC) with replaceable battery ♦ Supports battery-free boot ♦ Supports external battery option ♦ Provides Thermal and Voltage monitoring ♦ Supports Remote Access (Serial Console or Console Redirection) ♦ Provides General Purpose I/O (GPIO) capability
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Chapter 2 Product Overview Block Diagram Figure 2-3 shows the functional components of the ReadyBoard 800. Figure 2-3.
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Chapter 2 Product Overview Major Integrated Circuits (ICs) Table 2-1 lists the major integrated circuits (ICs or chips) on the ReadyBoard 800, including a brief description of each, and Figure 2-4 shows the location of the major chips. Table 2-1. Major Integrated Circuit Description and Function Chip Type Mfg. Model Description Function CPUs (U5) Intel Pentium M Celeron M 1.8 GHz, LV 1.4 GHz, ULV 1.
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Chapter 2 Product Overview Connector Definitions Table 2-2 describes the connectors shown in Figures 2-4 to 2-7. All I/O connectors use 0.1" pin spacing, where applicable, unless otherwise indicated. Table 2-2. Connector Descriptions Jack # Signal/Device Description BT1 RTC battery (B1) 2-pin, 1.25 mm header for battery input J1 Power On 3-pin, 2 mm header for Power On and +5V standby voltages J2 Power In 4-pin, 5.
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Chapter 2 Product Overview GPIO (J8) Serial B (J11A/B, COM 3 & 4) CPU Fan (J7) J7 CPU Test (J5) (Not loaded) J5 J8 J11 Serial A (J15A/B) (COM 1 & 2) J2 U1 J24 Power In (J2) U14 J15 U5 Power-On (J1) X3 LVDS (J14) J1 J14 D5 U15 CRT (21) Q9 Q44 J21 Q38 D15 JP1 U11 J3 Ethernet 1 (J16) U7 JP7 JP4 J16 Ethernet 2 (Gigabit) (J17) U12 J17 USB 0 & 1 (J18A/B) Q7 Q6 Q5 Q4 JP3 U13 J18 X2 F2 PS/2 Keyboard/ Mouse (J19) PCI-104 (J3) Y2 F3 J19 U3 X1 Infrared (IrDA) (J9)
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Chapter 2 Product Overview Jumper Definitions Table 2-3 describes the jumpers shown in Figure 2-7. Refer to the Oops! Jumper for BIOS recovery. Table 2-3. Jumper Settings Jumper # Installed/Enabled Removed/Enabled JP1* – ISA IRQ (SerialIRQ) Enabled (pins 1-2) Disabled (removed) Default JP2 – CMOS Normal/Clear Normal (pins 1-2) Default Clear (Resets CMOS, pins 2-3) JP3 – CF Master/Slave Master (pins 1-2) Slave (removed) Default JP4 – LCD Voltage Type Enable +3.
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Chapter 2 Product Overview Power/IDE LED Definitions Table 2-6.
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Chapter 2 Product Overview Q16 U25 Q20 D4 L12 Q17 U26 Q27 Q19 U28 Q28 Q29 U29 D6 U22 Q15 U19 D3 U32 Q12 Q14 U33 Q37 D9 D10 U16 Q16 DDR SODIMM Socket (J22) U18 D11 D12 Q31 D13 U31 D14 Compact Flash Socket (J23) Q26 J22 U24 Q35 D1 U4 AC’97 CODEC (U4) Q8 Q21 D7 U8 U9 D8 U23 Q25 U21 Q11 Q34 Q24 Q10 Q33 U37 RB800RfM_02a U20 J23 Figure 2-8. Connector and Component Locations (Bottom view) Switch Definition Table 2-7.
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Chapter 2 Product Overview Specifications Physical Specifications Table 2-9 lists the physical dimensions of the board. Figures 2-9 and 2-10 give the mounting dimensions, including side views, and Figure 2-9 shows the pin-1 connector locations. Table 2-9. Weight and Footprint Dimensions Parameter Dimensions Weight 0.117 kg. (0.26 lb.) Height (overall) 28.44 mm (1.12") Width 115 mm (4.5") Length 165 mm (6.5") PCB Thickness 1.574 mm (0.
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Chapter 2 Product Overview Mechanical Specifications 6.300 6.100 6.078 4.100 4.300 1.143 0.000 0.266 Figures 2-9 and 2-10 show the top view and side views of the ReadyBoard 800 with the mechanical mounting dimensions. 6.100 J7 J11 J8 J24 3 J2 U1 4 5.770 10 1 6 5.572 2 J15 U14 18 9 5 14 U5 J15B J15A 4.626 X3 D5 U15 5 10 15 Q44 J21 Q38 1 11 3.649 D15 JP1 U11 3.500 J3 9 1 2 10 JP7 JP4 J16 3.272 Q9 6 3.916 4.825 J1 J14 3.
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Chapter 2 Product Overview ReadyBoard 800 (Side view) USB 0 & 1 Keyboard/ Power/IDE Ethernet 1 (J18A/B) Mouse Activity Gigabit (J16) (USB 0 Lower) (J19A/B) LED (D2) Ethernet 2 Reset (J17) Switch CRT (J21) (J20) RB800sideviewa Serial 1 & 2 (J15A/B) (Serial 1 Lower) Compact Flash Socket (J23) 6.500 0.051 0.100 0.624 0.068 0.602 0.055 0.072 0.696 0.275 0.510 0.640 0.120 1.113 0.497 0.361 0.650 0.547 0.370 0.390 0.345 0.624 1.214 0.067 0.080 1.213 0.180 0.554 0.275 0.500 0.
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Chapter 2 Product Overview Environmental Specifications Table 2-11 provides the most efficient operating and storage condition ranges required for this board. Table 2-11. Environmental Requirements Parameter Model Temperature Operating Storage Humidity Operating Non-operating 800 MHz ULV Celeron M +0° to + 60° C (32° to + 140° F) –20° to +75° C (–4° to +167° F) 5% to 95% relative humidity, non-condensing 5% to 95% relative humidity, non-condensing 1.
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Chapter 3 Hardware Overview This chapter discusses the chips and features of the connectors in the following order: • CPU (U5) • Memory (J22) • PCI-104 (J3A, B, C, D) • IDE Interfaces (J6) • Compact Flash Socket (J23) • Floppy/Parallel Interface (J10) • Serial Interfaces (J11A/B, J15A/B) • USB (J13A/B, J18A/B) • Ethernet Interfaces (J16, J17) • Audio Interface (J4) • Video Interfaces (J14, J21) • Miscellaneous ♦ Utility Interfaces (J12) ♦ Reset Switch (J20) ♦ Keyboard/Mouse (J19) ♦ User GPIO signal
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Chapter 3 Hardware CPU (U5) The ReadyBoard 800 supports four Intel processor choices; high performance standard voltage 1.8 GHz Pentium M 745, Low Voltage (LV) 1.4 GHz Pentium M 738, Ultra Low Voltage (ULV) 1.0 GHz Celeron M 373, or Low Voltage (LV) 800 MHz Celeron M. Celeron M Processors The Celeron M Ultra Low Voltage (ULV) processor (Dothan core) at 800 MHz has 0 kB L2 Cache on board, with a 400 MHz FSB (front side bus).
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Chapter 3 Hardware Interrupt Channel Assignments The channel interrupt assignments are listed in Table 3-1. Table 3-1. Interrupt Channel Assignments (Typical) Device vs IRQ No.
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Chapter 3 Hardware Table 3-2.
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Chapter 3 Hardware PCI-104 Interface (J3) The PCI-104 expansion interface uses a 120-pin (30x4) 2 mm connector. This connector carries all of the appropriate PCI signals operating at clock speeds up to 33 MHz. The I/O Hub (82801DBM), integrates a PCI arbiter that supports up to four devices with three external PCI masters. This interface header accepts stackable modules and is located on the top of the board.
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Chapter 3 26 Hardware Pin # Signal Input/ Output Description 21 (A21) AD29 T/S 22 (A22) +5V 23 (A23) REQ0* 24 (A24) GND 25 (A25) GNT1* 26 (A26) +5V 27 (A27) CLK2 28 (A28) GND Ground 29 (A29) +12V +12.0 volts ±5% 30 (A30) NC Not connected - Reserved 31 (B1) SERIRQ Serial IRQ – This signal line provides the serial IRQs for the MiniModule ISA expansion board if used. See Table Notes.
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Chapter 3 Hardware Pin # Signal Input/ Output Description 49 (B19) C/BE3* T/S PCI Bus Command/Byte Enable 3 – See Pin-4 for more information. 50 (B20) AD26 T/S PCI Address and Data Bus Line 26 – See Pin-3 for more information. 51 (B21) +5V 52 (B22) AD30 53 (B23) GND 54 (B24) REQ2* 55 (B25) VI/O 56 (B26) CLK0 57 (B27) +5V 58 (B28) INTD* O/D Interrupt D – This signal is used to request interrupts only for multi-function devices.
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Chapter 3 Hardware Pin # Signal Input/ Output 77 (C17) AD22 T/S 78 (C18) IDSEL1 Initialization Device Select 1 – See Pin-18 for more information 79 (C19) VI/O Reference Voltage – +5 volts 80 (C20) AD25 T/S PCI Address and Data Bus Line 25 – See Pin-3 for more information. 81 (C21) AD28 T/S PCI Address and Data Bus Line 28 – See Pin-3 for more information.
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Chapter 3 Hardware Pin # Signal 106 (D16) AD19 Input/ Output T/S Description PCI Address and Data Bus Line 19 – See Pin-3 for more information. 107 (D17) +3.3V +3.3 volts ±5% 108 (D18) IDSEL2 Initialization Device Select 2 – See Pin-18 for more information. 109 (D19) IDSEL3 Initialization Device Select 3 – See Pin-18 for more information. 110 (D20) GND Ground 111 (D21) AD27 T/S PCI Address and Data Bus Line 27 – See Pin-3 for more information.
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Chapter 3 Hardware IDE Interface (J6) The ReadyBoard 800 provides one primary IDE connector (J6) for two IDE devices and one compact flash socket (J23) on the secondary IDE controller.
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Chapter 3 Hardware Pin # Signal Description 23 PDIOW* Primary Device I/O Write Strobe – Strobe signal for write functions. Negative edge enables data from a register or data port of the drive onto the host data bus. Positive edge latches data at the host. 24 GND Ground 25 PDIOR* Primary I/O Read Strobe – Strobe signal for read functions. Negative edge enables data from a register or data port of the drive onto the host data bus. Positive edge latches data at the host.
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Chapter 3 Hardware Compact Flash Socket (J23) The board contains a compact flash socket, which allows for the insertion of a compact flash card. The compact flash card acts as a standard IDE Drive and is connected to the Secondary IDE bus. If a compact flash card is installed, it is the only device using the secondary IDE bus. A jumper is used to select the Master/Slave mode. Refer to Table 2-3, Jumper Settings for more information.
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Chapter 3 Hardware Pin # Signal Description 25, 26 CD2, CD1 Card Detect 1 & 2 – Connected through 100k ohm resister to +5 VDC, when no CF card installed. A low (ground) on either pin causes an Or Gate to switch placing VCC on CF voltage pins. Refer to pins -13, -36, -38. 27 SDD11 Secondary Disk Data 11 – Refer to SDD3 on pin-2 for more information. 28 SDD12 Secondary Disk Data 12 – Refer to SDD3 on pin-2 for more information.
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Chapter 3 Hardware Floppy/Parallel Interface (J10) The Super I/O controller (W83627HF) provides the floppy controller and the parallel port controller. The floppy controller and the parallel port controller share the same output connector (J10) on the board and the device selection is made in the BIOS Setup Utility. • Floppy Port Controller only supports one floppy drive, in the standard formats, such as 360 kB, 720 kB, 1.2 MB, 1.44 MB, or 2.88 MB drives.
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Chapter 3 Hardware Pin # Signal Description 13 PSLCT Printer Select – This is a status output signal from the printer. A High State indicates it is selected and powered on. WGATE* Floppy Write Enable – Drive signal to enable current flow in the write head. AFD* Parallel Auto Feed* – This is a request signal into the printer to automatically feed one line after each line is printed.
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Chapter 3 Hardware Serial Interfaces (J15A/B, J11A/B) The ReadyBoard supports 4 independent serial ports, using two separate chips. The Super I/O controller (W83627HF) provides Serial ports 1 and 2 through the Serial A DB9 connectors (J15A/B) and the I/O Hub (82801DBM) provides serial ports 3 and 4 through Serial B connector (J11A/B).
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Chapter 3 Hardware Serial A Interface (J15A/B) Table 3-8. Serial A (Serial 1) Interface Pin/Signal Descriptions (J15A) Pin # Signal Description 1 DCD1* Data Carrier Detect 1 – Indicates external serial device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input is driven by DTR1 as part of the DTR/DSR handshake.
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Chapter 3 Hardware Serial B Interface (J11A/B) Table 3-10. Serial B Interface Pin/Signal Descriptions (J11A/B) Pin # Pin # Signal DB9 A1 1 (COM3) Description DCD3* Data Carrier Detect 3 – Indicates external serial device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input is driven by DTR3 as part of the DTR/DSR handshake. A2 6 DSR3* Data Set Ready 3 – Indicates external serial device is powered, initialized, and ready.
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Chapter 3 Hardware Pin # Pin # Signal DB9 Description B17 4 DTR4* Data Terminal Ready 4 – Indicates serial port is powered, initialized, and ready. Used as hardware handshake with DSR4 for overall readiness. B18 9 NC Not connected (RI) B19 5 GND Ground B20 NC NC Not connected Notes: The shaded area denotes power or ground. RS-232 signals are listed first followed by RS-485/RS-422. The signals marked with * = Negative true logic.
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Chapter 3 Hardware USB Interfaces (J18A/B, J13A/B) The I/O Hub (82801DBM) provides the USB solution for both legacy UHCI controllers and EHCI controller (USB 2.0) support. The I/O Hub (Southbridge) contains port-routing logic that determines which controller (UHCI or EHCI) handles the USB data signals. The PC style (or Standard) connector (J18A/B) provides two of the four USB ports (USB0 and USB1). The other two USB ports share a single 10-pin header (J13A/B) on the board. USB 2.
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Chapter 3 Hardware Secondary USB2 and USB3 (J13A/B) Table 3-12 describes USB 2 & 3, J13A/B at 10-pins, 2 rows, odd/even (1, 2) with 2 mm pin spacing. Table 3-12.
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Chapter 3 Hardware Ethernet Interfaces (J16, J17) The Ethernet solution is provided by two Intel Ethernet controllers, Gigabit 82541GI (in GI, PI, or EI versions) and 82551ER for Port 2 and Port 1 respectively. Both controllers consist of a Media Access Controller (MAC) and a physical layer (PHY) combined into a single component solution. Gigabit Ethernet Controller The Intel® 82541GI Gigabit Ethernet Controller is 32-bit wide, PCI 2.
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Chapter 3 Hardware • Supports four-pair, 100 ohm, Category 5 UTP (Unshielded Twisted Pair) wiring Tables 3-13 describes the pin-outs and signals of Gigabit Ethernet port, Ethernet Port 2. Table 3-13. Ethernet Port 2 Pin/Signal Descriptions (J17) Pin # Signal Description 1 MDI0+ 2 MDI0- Media Dependent Interface [0] – In MDI* configuration (1000BaseT), MDI[0]+/corresponds to BI_DA+/-, and in MDI-X* configuration, MDI[0]+/- corresponds to BI_DB+/-.
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Chapter 3 Hardware 10/100BaseT Ethernet Controller Ethernet Port 1 uses an Intel 82551ER Fast Ethernet, 32-bit PCI controller chip and consists of both the Media Access Controller (MAC) and the physical layer (PHY) combined into a single component solution. The 82551ER is a 32-bit PCI controller that features enhanced scatter-gather bus mastering capabilities, which enables the 82551ER to perform high-speed data transfers over the PCI bus.
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Chapter 3 Hardware Audio Interface (J4) The audio solution on the ReadyBoard 800 is provided by the (Southbridge) I/O Hub (82801DBM) and the on-board Audio CODEC (ALC202A). These two chips use a digital interface to communicate between the two, which is defined by AC’97 and is revision 2.3 compliant. The input or output signals for the audio interface go through the 16-pin connector (J4) to an external cable and/or board, which has the respective audio connections.
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Chapter 3 Hardware Video Interfaces (J14, J21) The Graphics & Memory Hub (Northbridge) chip (82855GME) provides the graphics control and video signals to the traditional glass CRT monitors and the LVDS flat panel displays.
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Chapter 3 Hardware CRT Interface (J21) Table 3-16. CRT Interface Pin/Signal Descriptions (J21) Pin # Signal Description 1 RED Red – This is the Red analog output signal to the CRT. 2 GREEN Green – This is the Green analog output signal to the CRT. 3 BLUE Blue – This is the Blue analog output signal to the CRT.
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Chapter 3 Hardware LVDS Interface (J14) Table 3-17. LVDS Interface Pin/Signal Descriptions (J14) Pin # Signal Description 1 +12V +12 Volts 2 VCC_LCD +3.3 Volts or +5 Volts Depends on JP4 setting (+3.
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Chapter 3 Hardware Miscellaneous Utility Interface (J12) • Power-On – This control signal is provided externally through a switch by connecting ground to pin-1 on the Utility connector (J12). • Reset Switch – This signal is provided externally through a switch by connecting ground to pin-3 on the Utility connector (J12). This signal line is shared with Reset Switch (SW1).
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Chapter 3 Hardware User GPIO Signals (J8) The ReadyBoard 800 provides eight GPIO pins for custom use and the signals are routed to the J8 connector. Ampro has provided sample applications showing how to use the GPIO pins in the Miscellaneous Source Code Examples subdirectory, under the ReadyBoard 800 Software menu on the ReadyBoard 800 Doc & SW CD-ROM, (CD-ROM\Software\Misc\GPIO).
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Chapter 3 Hardware Table 3-21. Infrared Interface Pin/Signal Descriptions (J9) Pin # Signal Description 1 VCC +5 Volts DC +/ 5% 2 IRTX IR Transmit Data 3 CIRRX IR Mode Select 4 IRRX IR Receive Data 5 GND Ground Note: The shaded area denotes power or ground. System Management Bus (SMBus, J25) The I/O Hub (Southbridge) chip (82801DBM) contains both a host and slave SMBus port; but the host cannot access the slave internally.
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Chapter 3 Hardware Oops! Jumper (BIOS Recovery) The Oops! jumper is provided in the event the BIOS settings you’ve selected prevent the system from booting, but does not reset CMOS or change the Time & Date in the BIOS. Refer to the CMOS Normal/Clear jumper (JP2) to reset the BIOS and change the Time & Date. By using the Oops! jumper, you can prevent the current BIOS settings in Flash from being loaded, forcing the use of the default BIOS settings.
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Chapter 3 Hardware Watchdog Timer (WDT) The watchdog timer (WDT) restarts the system if an error or mishap occurs, allowing the system to recover from the mishap, even though the error condition may still exist. Possible problems include failure to boot properly, loss of control by the application software, failure of an interface device, unexpected conditions on the bus, or other hardware or software malfunctions.
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Chapter 3 Hardware Power Interfaces (J1, J2) The ReadyBoard 800 uses various voltages onboard, but only one voltage is required externally (+5 volts) through the external connector, which uses a 4-pin header with 0.200" (5.08 mm) spacing. The optional +12V volts is also provided on the input connector as a pass through voltage, but is not used on the board except for CPU Fan, LVDS power, PCI-104 bus, and optional ISA bus power.
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Chapter 3 Hardware CPU Fan (J7) Table 3-26 lists the pins and signals of the CPU Fan and it has 3 pins, single row, with 0.100" pin spacing. Table 3-26. CPU Fan (J7) Pin # Signal Description 1 Fan_Tach Fan Tachometer – This signal indicates Fan speed. 2 +12V +12.0 volts DC +/- 5% 3 GND Ground Note: The shaded area denotes power or ground.
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Chapter 3 Hardware Power and Sleep States The following information only applies if an ATX power supply is used to provide power to the ReadyBoard 800. If a non-ATX power supply is used, then the ReadyBoard 800 is only controlled by the Power On/Off switch on the power supply and the various sleep states are not available. The sleep states are OS dependent and not available if your OS does not support power management based on the ACPI standard.
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Chapter 3 Hardware ♦ Normally, to enter this sleep state, the ReadyBoard 800 must be fully powered on (S0) and the OS transitions the ReadyBoard into this standby state (S1) under user control. ♦ To exit this sleep state, typically the Power-On switch is used to wake up the ReadyBoard 800 to restore full operation, including the Power On LED. Typically, pressing the Power-On switch for less than 4 seconds (default) will restore full operation. • 3rd state is a hibernate or suspend-to-disk state (S4).
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Chapter 3 58 Hardware Reference Manual ReadyBoard 800
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Chapter 4 BIOS Setup Utility Introduction This chapter describes the BIOS Setup Utility menus and the various screens used for configuring the ReadyBoard 800. Some features in the Operating System or application software may require configuration in the BIOS Setup Utility screens. This section assumes the user is familiar with general BIOS Setup Utility and does not attempt to describe the BIOS functions.
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Chapter 4 BIOS Setup Utility Accessing BIOS Setup Utility (Remote Access) Once you set up the BIOS Utility for Remote Access (serial console or console redirection) in VGA mode, entering the BIOS in the remote access mode, is very similar to the method used when entering the BIOS with a VGA display. 1. Turn on the power supply to the ReadyBoard 800 and access the BIOS Setup Utility in VGA mode. 2. Set the BIOS feature Remote Access to [Enabled] under the Advanced menu. 3.
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Chapter 4 BIOS Setup Utility BIOS Setup Utility Menus Main Menu Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit System Overview Use [ENTER], [TAB] or [SHIFT-TAB] to select a field. AMIBIOS Version : 08.00.11 Build Date: xx/xx/xx ID : SWxxxxxxx Processor Type : Intel(R) Pentium(R) M processor 1.
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Chapter 4 BIOS Setup Utility Advanced Menu Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Advanced Settings Power Exit Configure CPU WARNING: Setting wrong values in below sections may cause system to malfunction.
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Chapter 4 BIOS Setup Utility >IDE Configuration • OnBoard PCI IDE Controller – [Disabled], [Primary], [Secondary], or [Both] This item specifies the IDE channels used by the onboard PCI IDE controller. ♦ If [Disabled] is selected, the ReadyBoard 800 is prevented from using either of the onboard IDE controllers. ♦ If [Primary] is selected, the BIOS only detects the Primary IDE channel, including both Primary Master and Primary Slave.
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Chapter 4 BIOS Setup Utility ∗ If [0] is selected, the BIOS uses PIO mode 0, with a data transfer rate of 3.3 MBs. ∗ If [1] is selected, the BIOS uses PIO mode 1, with a data transfer rate of 5.2 MBs. ∗ If [2] is selected, the BIOS uses PIO mode 2, with a data transfer rate of 8.3 MBs. ∗ If [3] is selected, the BIOS uses PIO mode 3, with a data transfer rate of 11.1 MBs. ∗ If [4] is selected, the BIOS uses PIO mode 4, with a data transfer rate of 16.6 MBs.
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Chapter 4 BIOS Setup Utility ♦ Primary IDE Slave – [Not Detected] or [Device type] The descriptions used for the Primary IDE Master are the same for the Primary IDE Slave except where noted.
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Chapter 4 BIOS Setup Utility • IDE Detect Time Out (Seconds) – [0], [5], [10], [15], [20], [25], [30], or [35] The field determines how long the BIOS searches for the available IDE devices on the specified channels. Some IDE HDDs take the BIOS longer to locate than others, but this field allows you fine-tune the settings to allow for faster boot times. ∗ If [0] is selected, the BIOS does not search for an IDE device.
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Chapter 4 BIOS Setup Utility >Super I/O Configuration • Onboard Floppy Controller – [Disabled] or [Enabled] • Serial Port 1 Address – [Disabled], [3F8/IRQ4], [2F8/IRQ3], [3E8/IRQ4], or [2E8/IRQ3] • Serial Port 2 Address – [Disabled], [3F8/IRQ4], [2F8/IRQ3], [3E8/IRQ4], or [2E8/IRQ3] ♦ Serial Port 2 Mode – [Normal], [IrDA], or [ASK IR] ∗ If [IrDA] or [ASK IR] are selected, the following items appear on screen.
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Chapter 4 BIOS Setup Utility >Hardware Health Configuration • H/W Health Function – [Disabled] or [Enabled] Hardware Health Event Monitoring ♦ System Temperature [Current board temperature in °C/°F] ♦ CPU Temperature [Current CPU die temperature in °C/°F] ♦ VcoreA [Current CPU Core A reading] ♦ VcoreB [Current CPU Core B reading] ♦ +3.3Vin [Current +3.
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Chapter 4 BIOS Setup Utility ♦ Redirection After BIOS POST – [Disabled], [Boot Loader], or [Always] ♦ Terminal Type – [ANSI], [VT100], or [VT-UTF8] ∗ If [VT-UTF8] is selected, the following item disappears from the screen.
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Chapter 4 BIOS Setup Utility The remaining fields only appear if the BIOS detects additional USB mass storage devices up to three more USB devices.
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Chapter 4 BIOS Setup Utility PCIPnP Menu Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Advance PCI/PnP Settings WARNING: Setting wrong values in below sections may cause system to malfunction.
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Chapter 4 BIOS Setup Utility • PCI IDE BusMaster – [Disabled] or [Enabled] ∗ If [Enabled] is selected, the BIOS allows the IDE controller on the PCI local bus to have bus mastering capabilities. • OffBoard PCI/ISA IDE card – [Auto], [PCI Slot 1], [PCI Slot 2], [PCI Slot 3], or [PCI Slot 4] ∗ If [Auto] is selected, BIOS is allowed to automatically select the location of an OffBoard PCI IDE adapter card.
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Chapter 4 BIOS Setup Utility • DMA Channel 1 – [Available] or [Reserved] ∗ If [Available] is selected, the BIOS can assign this DMA Channel to a PCI/PnP device. ∗ If [Reserved] is selected, the BIOS holds this DMA Channel for a legacy ISA device. • DMA Channel 3 – [Available] or [Reserved] ∗ If [Available] is selected, the BIOS can assign this DMA Channel to a PCI/PnP device. ∗ If [Reserved] is selected, the BIOS holds this DMA Channel for a legacy ISA device.
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Chapter 4 BIOS Setup Utility Boot Menu Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Boot Settings Power Exit Configure Settings during System Boot. Boot Settings Configuration Boot Device Priority Hard Disk Drives Removable Drives CD/DVD Drives ←→ ↑ ↓ Enter F1 F10 ESC Select Screen Select Item Go to Sub Screen General Help Save and Exit Exit V02.xx (C) Copyright 1985-2004, American Megatrends, Inc. Figure 4-4.
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Chapter 4 BIOS Setup Utility • Bootup Num-Lock – [Off] or [On] This field enables or disables the Num-Lock (Number Lock) keypad, including the 10-key numeric keys, to be turned on or off automatically when the system boots up. The field selection will remain unchanged until the Num-Lock key on the keyboard is pressed to change the NumLock state. .
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Chapter 4 BIOS Setup Utility ∗ Example [HDD: Mfg, model] • 4th Boot Device – [1st Floppy Drive], [HDD: Mfg + model], [CD/DVD], [Network:IBA xE Slo], or [Disabled] ∗ Example [Network:IBA xE Slo] (onboard Ethernet 2 connection) Changing Boot Order (Swap) Example: 1. Scroll to the 1st Boot Device [1st Floppy Drive] and press the key. The Options list appears with all of the detected devices listed including [Disabled] as an option.
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Chapter 4 BIOS Setup Utility st The 1 Drive in this list is the only device to appear in the Boot Device Priority list. The remaining fields and options are dependent on the number of removable devices detected by the BIOS. Use the swap example described earlier when changing the order of these devices.
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Chapter 4 BIOS Setup Utility Security Menu Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Security Settings Power Exit Install or Change the password. Supervisor Password: Not installed User Password: Not installed Change Supervisor Password Change User Password Boot Sector Virus Protection [Disabled] ← → ↑ ↓ Enter F1 F10 ESC Select Screen Select Item Change General Help Save and Exit Exit V02.xx (C) Copyright 1985-2004, American Megatrends, Inc. Figure 4-6.
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Chapter 4 BIOS Setup Utility If the Supervisor Password field is “Installed”, the following item appears on the screen. ♦ User Access Level – [No Access] or [View Only], [LIMITED], or [Full Access] To clear Supervisor password: . a. Press to access the pop-up menu, Enter New Password: b. Do not enter a password and press the key, following the prompts. c. Repeat this process until the old password is gone, which is indicated by Not Installed. • Change User Password a.
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Chapter 4 BIOS Setup Utility Chipset Setup Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Advanced Chipset Settings Power Exit Options for NB WARNING: Setting wrong values in below sections may cause system to malfunction. NorthBridge Configuration SouthBridge Configuration ←→ ↑ ↓ Enter F1 F10 ESC Select Screen Select Item Go to Sub Screen General Help Save and Exit Exit V02.xx (C) Copyright 1985-2004, American Megatrends, Inc. Figure 4-7.
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Chapter 4 BIOS Setup Utility Flat Panel Type [None] ♦ Refer to Table 4-3 for the list of supported resolutions and flat panel types. Some flat panels may require video BIOS modifications. It you think this is the case, or would like help in setting up your flat panel, contact Ampro for assistance with the flat panel adaptation. ♦ Local Flat Panel Scaling – [Auto], [Forced Scaling], or [Disabled] Table 4-3.
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Chapter 4 BIOS Setup Utility Power Menu Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset APM Configuration Power Management/APM Video Power Down Mode Hard Disk Power Down Mode Standby Time Out Suspend Time Out Throttle Slow Clock Ratio Keyboard & PS/2 Mouse FDC/LPT/ COM Ports Primary Master IDE Primary Slave IDE Secondary Master IDE Secondary Slave IDE [Enabled] [Suspend] [Suspend] [Disabled] [Disabled] [ 50%] [Monitor] [Monitor] [Monitor] [Monitor] [Monitor] [Monitor] Power Bu
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Chapter 4 BIOS Setup Utility ♦ Hard Disk Drive Power Down Mode – [Disabled], [Standby] or [Suspend] ∗ If [Disabled] is selected, the hard disk drive (HDD) is prevented from going into a power down mode. ∗ If [Standby] is selected, the hard disk drive (HDD) is stopped from spinning during this standby mode. ∗ If [Suspend] is selected, the power to the hard disk drive (HDD) is removed during this system suspend state.
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Chapter 4 BIOS Setup Utility ♦ Secondary master IDE – [Ignore] or [Monitor] ∗ If [Monitor] is selected, activity on the Secondary Master IDE channel can wake up the system from a power management state. ∗ If [Ignore] is selected, activity on the Secondary Master IDE channel will not wake up the system from a power management state. ♦ Secondary slave IDE – [Ignore] or [Monitor] ∗ If [Monitor] is selected, activity on the Secondary Slave IDE channel can wake up the system from a power management state.
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Chapter 4 BIOS Setup Utility Exit and Default Menu Screen BIOS Setup Utility Main Advanced PCIPnP Boot Security Exit Options Chipset Power Exit Exit System Setup after saving the changes. Save Changes and Exit Discard Changes and Exit Discard Changes F10 key can be used for this operation Load Optimal Defaults Load Failsafe Defaults ← → ↑ ↓ Enter F1 F10 ESC Select Screen Select Item Go to Sub Screen General Help Save and Exit Exit V02.xx (C) Copyright 1985-2004, American Megatrends, Inc.
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Chapter 4 BIOS Setup Utility • Select Ok to discard changes and exit. The < ESC > key can also be used for this operation. • Discard Changes This selection allows you to discard any changes made to BIOS Setup Utility without leaving BIOS Setup Utility. • Select Discard Changes from the Exit menu and press . The following text appears on screen: Discard Changes? [Ok][Cancel] • Select Ok to discard changes. The < F7 > key can also be used for this operation.
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Appendix A Technical Support Ampro Computers, Inc. provides a number of methods for contacting Technical Support listed in the Table A-1 below. Requests for support through the Virtual Technician are given the highest priority, and usually will be addressed within one working day. • Ampro Virtual Technician – This is a comprehensive support center designed to meet all your technical needs. This service is free and available 24 hours a day through the Ampro web site at http://ampro.custhelp.com.
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Appendix A 88 Technical Support Reference Manual ReadyBoard 800
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Appendix B LAN Boot Feature This Appendix describes the LAN Boot feature provided by the ReadyBoard 800. The balance of this appendix briefly describes how to set up LAN Boot using the PXE boot agent BIOS settings. The LAN Boot feature is not enabled or disabled in the ReadyBoard 800 BIOS Setup Utility, but its boot order can be changed. Introduction LAN Boot is supported by a single Ethernet port on the ReadyBoard 800, and is based on the Preboot Execution Environment (PXE), an open industry standard.
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Appendix B LAN Boot Feature Accessing PXE Boot Agent BIOS Setup Utility The Intel PXE Boot agent is integrated into the ReadyBoard 800 BIOS and only supports one protocol, the Wired for Management (WfM) 2.0 specification for Preboot eXecution Environment (PXE). There are no options or fields in the ReadyBoard 800 BIOS Setup Utility to disable or enable the LAN Boot feature. The LAN Boot feature can be moved to the top of the boot order, and will be detected if an Ethernet connection is available.
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Appendix B LAN Boot Feature PXE-E61: Media test failure, check cable (no cable connection) PXE-M0F: Exiting Intel Boot Agent PXE Boot Agent Setup Screen Intel (R) Boot Agent GE vx.x.xx Setup Menu Network Boot Protocol Boot Order Show Setup Prompt Setup Menu Wait Time PXE (Preboot eXecution Environment) Use BIOS Setup Boot Order Enabled 2 seconds (Field selection text message) Cancel Changes Next Option Change Value Save Configuration Figure B-1.
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Appendix B LAN Boot Feature Press F12 if you want to boot from the Network You can use this feature to skip going to BIOS Setup to move [Network:…] ahead of the other boot devices and set the Network (PXE Boot Agent) to boot the system. 1. Press F12 to boot the system using the LAN Boot (PXE) feature. This selects the network (Onboard LAN or Network: IDA …) ahead of the other boot devices for the current boot and you will see the text line change to the following message.
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Index 1.8 GHz CPU requirement CPU fan +12V ........................................... 20, 55 Ampro Products CoreModule™ Family ....................................... 4 ETX Family....................................................... 4 LittleBoard™ Family......................................... 4 MightyBoard™ Family...................................... 4 MiniModule™ Family ....................................... 4 ReadyBoard™ 700 ............................................ 3 ReadyBox™ Family ..........
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Index serial port settings............................................ 60 serial terminal .................................................. 52 terminal emulation software ............................ 52 See also Remote Access See also Serial Console dimensions ReadyBoard 800 .............................................. 17 Documentation and Software (Doc & SW) CD-ROM...................................... 2 Embedded Platform for Industrial Computing (EPIC).............................
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Index Real Time Clock (RTC) BIOS setting .................................................... 84 supported feature ............................................. 51 reference material compact flash specifications.............................. 1 EPIC specifications ........................................... 1 Infrared (IrDA) interface ................................. 50 PC/104 specifications ........................................ 1 PC/104-Plus specifications ................................
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Index Switches external ............................................................ 49 reset switch (J20) ............................................. 16 table notes PCI input and output codes.............................. 29 Technical Support contact information.......................................... 87 Embedded Design Resource Center ................ 87 Virtual Technician ........................................... 87 terminal emulation software console redirection...................................
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