Specifications

ix
Table 2–19 J9 Mating Connector ................................................................................................. 2–24
Table 2–20 Typical Byte-wide Devices........................................................................................ 2–26
Table 2–21 EPROM Jumpering for S0......................................................................................... 2–29
Table 2–22 Flash EPROM Jumpering for S0................................................................................ 2–30
Table 2–23 SRAM and NOVRAM Jumpering for S0................................................................... 2–31
Table 2–24 Byte-Wide Jumper Pin Signals (W15) ....................................................................... 2–32
Table 2–25 Video Connector Summary........................................................................................ 2–33
Table 2–26 CRT Interface Connector (J5).................................................................................... 2–34
Table 2–27 J5 Mating Connectors................................................................................................ 2–34
Table 2–28 Flat Panel Video Connector (J3)................................................................................ 2–35
Table 2–29 J3 Mating Connectors................................................................................................ 2–36
Table 2–30 LCD Bias Supply Option Connector (J4)................................................................... 2–37
Table 2–31 External Video Overlay Connector (J6)..................................................................... 2–40
Table 2–32 J6 Mating Connector ................................................................................................. 2–41
Table 2–33 RJ45 Twisted Pair Connector (J7) ............................................................................. 2–42
Table 2–34 AUI Connector (J8)................................................................................................... 2–43
Table 2–35 J8 Mating Connector ................................................................................................. 2–43
Table 2–36 Utility Connector (J16).............................................................................................. 2–46
Table 2–37 J16 Mating Connector ............................................................................................... 2–46
Table 2–38 Keyboard Connector (J16)......................................................................................... 2–47
Table 2–39 PC/104 Expansion Bus Connector, P1 (A1-A32)....................................................... 2–50
Table 2–40 PC/104 Expansion Bus Connector, P1 (B1-B32) .......................................................2–51
Table 2–41 PC/104 Expansion Bus Connector, P2 (C0-C19) .......................................................2–52
Table 2–42 PC/104 Expansion Bus Connector, P2 (D0-D19)....................................................... 2–53
Table 2–43 PC/104-Plus Expansion Bus Connector, P21 (A1-D30)............................................. 2–54
Table 2–44 Interrupt Channel Assignments.................................................................................. 2–55
Table 2–45 DMA Channel Assignments ......................................................................................2–56
Table 3–1 Functions on Each SETUP Page.................................................................................. 3–2
Table 3–2 Serial Port Options...................................................................................................... 3–11
Table 3–3 Parallel Port Options ................................................................................................... 3–12
Table 3–4 Parallel Port Modes..................................................................................................... 3–12
Table 3–5 Required Commands ................................................................................................... 3–17
Table 3–6 Parallel Port Register Map........................................................................................... 3–21
Table 3–7 Parallel Port Register Bits ........................................................................................... 3–23
Table 3–8 Standard and PS/2 Mode Register Bit Definitions........................................................ 3–23
Table 3–9 Memory Map............................................................................................................... 3–30
Table 3–10 I/O Map...................................................................................................................... 3–31