Specifications

Software Configuration
3–19
3.10.4 Interrupt Sharing
Having four serial ports reveals a weakness in the standard PC architecture. Namely, if you require all
four ports to use interrupts, you must determine how to deal with the interrupts for the third and fourth
serial ports. Normally, Serial 3 attaches to IRQ4 and Serial 4 attaches to IRQ3, but, since interrupts are
not normally a sharable resource, you could do this only if you enabled and disabled the conflicting
interrupt lines, a less than ideal solution.
Ampro provides two solutions to this problem, selectable with jumper options. If you want to assign
different interrupts to Serial 3 and Serial 4, you can use jumpers to assign IRQ12 to Serial 3 and IRQ10
to Serial 4. As an alternative, you can jumper the ports to participate in true interrupt sharing. That is,
Serial 1 and Serial 3 share IRQ4 and Serial 2 and Serial 4 share IRQ3. This is accomplished by circuitry
that connects the interrupt lines from each port in a wired-OR arrangement.
Interrupt ORing allows true interrupt sharing, because it assures that an interrupt is detected as soon as
any device requests it. It is then necessary only to determine which of the devices sharing the common
interrupt assignment produced the interrupt request. This can be accomplished by simple device status
read operations.
Sample Code for Interrupt Sharing
The following assembly language code is an example of software that supports the wired-OR approach to
interrupt sharing. In the code sample shown, Serial 1 and Serial 3, located at hardware addresses 03F8h
and 03E8h, respectively, have both been assigned to interrupt IRQ4. The interrupt line will be activated
whenever either of the serial ports contain a new byte of received data. When an interrupt is detected on
IRQ4, the interrupt service routine reads the status register of each serial port to determine whether that
port caused the interrupt (is holding a byte of received data). If data is present, it is read from that port
and written to the other port. After both ports have been serviced in this manner, the interrupt is cleared.
Then both ports are interrogated again. This second set of status reads covers the case in which a new
byte of data arrives while the first set of status reads are taking place, before the interrupt is cleared. This
assures that all the received bytes will be read.
INTR EQU 20H ; 8259 interrupt controller is 20h,21h
INTR1 EQU INTR+1
;
; ************ INTERRUPT SERVICE ROUTINE ************
;
SerInt:
PUSH AX
PUSH DX
MOV DX,CS:IFl1
IN AL,DX
AND AL,1 ; see if data received
JNZ NIn1
In1:
SUB DX,2 ; point to data register
IN AL,DX ; read data in
MOV DX,CS:Ser1
OUT DX,AL ; write data to other port
NIn1:
MOV DX,CS:IFl3
IN AL,DX
AND AL,1 ; see if data received
JNZ NIn2
In2:
SUB DX,2 ;point to data register